[SI-LIST] Re: Shielding clock traces on PCB's
- From: "Salman Jiva" <sjiva@xxxxxxxxxx>
- To: <william.coombs@xxxxxxxxxxxxxx>, <si-list@xxxxxxxxxxxxx>
- Date: Tue, 2 Jan 2007 14:17:34 -0800
William,
Crosstalk noise varies greatly with distance between traces as well as
the height of the trace above the reference plane. If you have already
used sufficient separation between adjacent traces, you may not see much
improvement from placing a guard trace in between.
Refer to this article by Dr. Eric Bogatin for details
http://www.altera.com/technology/signal/columns/2006/2006-10-oct_1.html
Hope this helps,
Salman Jiva
Altera Corporation
Technical Marketing Engineer
-----Original Message-----
From: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx]
On Behalf Of Coombs, William B. (US SSA)
Sent: Tuesday, January 02, 2007 11:03 AM
To: si-list@xxxxxxxxxxxxx
Subject: [SI-LIST] Shielding clock traces on PCB's
=3D20
Hello all,
In regards to noise reduction, how effective do guard traces
seem to be?
Iv'e experimented with Hyperlynx by simulating my clock lines=3D20
on the spectrum analyzer. These clock lines were simulated with=3D20
and without grounded guard traces wrapped around the clock traces.=3D20
The results showed little to no noise reduction with the addition
of the guard traces.
The clock lines & guard traces were routed on an internal layer in=3D20
a dual-stripline Stackup.
Thanks.
William B. Coombs
BAE Systems
(973)636-7463
Email:William.Coombs@xxxxxxxxxxxxxx
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