Hi everyone,
While I was conducting a design review today, my client expressed some
concern over serpentine routing that was used to enforce length matching
between an SDRAM chip running at 166 MHz (1 ns rise time) and an MCU.
The concern was that the serpentine routing structure would create an
EMI problem. The traces are routed according to specs in the datasheet
with a reference plane on the adjacent layer.
I have never heard of serpentine routing creating a new EMI problem or
making some existing EMI problem worse. I started looking into it and I
find mixed recommendations. This is one instance where I won't trust
application notes, they all give inconsistent guidance, and they show
poor images of the exact way serpentine routing should be implemented.
I looked into the literature and there are some studies on EMI, effects
on eye diagrams, and reflections from serpentine routing structures.
Here's one example:
https://www.researchgate.net/publication/321143234_Differential_Lines_Paired_with_Serpentine_as_Potential_EMI_Aggressors_in_Mobile_Electronic_Devices
If anyone can provide some perspective, or if someone can confirm this
is just another signal integrity myth, I'd appreciate it. Thanks in
advance.
--
Zachariah Peterson
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