[SI-LIST] Re: Serpentine Traces
- From: Eric Goodill <ericg@xxxxxxxxxxx>
- To: si-list@xxxxxxxxxxxxx
- Date: Tue, 10 Sep 2002 10:32:06 -0700
Bob,
What is 'close' in your test board?
-Eric
Robert Haller wrote:
> Praveen,
> This is a good question and has been raised before on the SI-LIST.
> Serpentine etch is often done to match clock lines or source syncronous
> data lines.
>
> I did bench testing of serpentine lines, in conjuction with simulations.
> I ran SPICE simulations using field solved 2d models then measured
> varying serpentine configurations. I examined impedance and propagation
> delay variations as a function of varying spacing, and signal edge rate.
>
> When transmission lines are serpentined 'close' to themselves the
> propagation delay decreases (The lines got faster). For example if I
> compare a straight control line and a sepertined line of the same length
> on the same layer, with all the fixturing nulled the propagation delay
> went from 176ps/in (straight line) to 170 ps/inch (serpentined line).
> You can think of the signal taking a shortcut across the distributed
> self capacitance of the closely serpentined lines.
> You might think a propagation delay reduction is good, but I also found
> the variability of prop velocity increased. I believe the variability
> increased because the capacitive coupling varies based on geometry,
> while normally the dielectric constant variations are the only source of
> prop delay variability (for a specific rise time and frequency). The
> variability is a small effect but is important when doing source
> syncronous designs.
>
>
> Regards,
> Bob
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