[SI-LIST] Re: Serpentine Traces

  • From: "Jack W.C. Lin" <JackWCLin@xxxxxxxxxxxx>
  • To: Robert Haller <rhaller@xxxxxxxxxx>, ericg@xxxxxxxxxxx
  • Date: Wed, 9 Oct 2002 08:45:40 +0800

Dear all:
As you know that serpentine routing will take shorter time to propagate
signal from source to load than a straight line. But I found an interesting
result from my case. In my DDR design,said some certain group. DQ length is
almost the same with DQS,DQ did a serious serpentine routing but DQS a
little. In our common sense,the flight time between them will differ a
little. But I found that they differ too much,around 1.4 ns. DQS leading DQ?
An unbelevable result. I found that DQ take 45 degree bending for
serpentine, and DQS take ARC serpentine. If I modified all serpentine of DQ
as ARC serpentine with same length, the flight time difference with DQS
reduce to around 0.8ns. It's improved but not good enough. (my case is
DDR333,flight_max=0.45ns,SIM tool is XTK). Is there any one experienced the
similiar case? Any suggestion is highly appreciated.
PS: I had delete all net but leave this problem DQ and related DQS, no other
extra coupling but themself due to serpentine routing.
Jack
Jack W.C. Lin
CAD&EMC Team in aopen In. 

-----­ì©l°T®§-----
    ±H¥óªÌ: "Robert Haller" <rhaller@xxxxxxxxxx>
    ±H¥ó¤é´Á:  2002/9/11 ¤W¤È 02:19:22
    ¦¬¥óªÌ: "ericg@xxxxxxxxxxx" <ericg@xxxxxxxxxxx>
    ½Æ¥»: "si-list@xxxxxxxxxxxxx" <si-list@xxxxxxxxxxxxx>
    ¥D¦®: [SI-LIST] Re: Serpentine Traces
    
    
    Eric ,
        For the example given, 176 ps/in -> 170 ps/in the difference was 
    between 5/50 and 5/20 (Line width, /Line Spacing). The delay variations 
    were even more dramatic at tighter spacings.
    
    To answer Andy's question, I click Info in Allegro - which I believe 
    measures the center of the line.
    
    Regards,
    Bob
    -- 
    Robert J. Haller (rhaller@xxxxxxxxxx)
    Principal Consultant
    Signal Integrity Software Inc.
    6 Clock Tower Place, Suite 250
    Maynard, MA 01754
    Phone: (978) 461-0449, ext 15
    
    
    Eric Goodill wrote:
    > Bob,
    > 
    > What is 'close' in your test board?
    > 
    > -Eric
    > 
    > Robert Haller wrote:
    > 
    > 
    >>Praveen,
    >>  This is a good question and has been raised before on the SI-LIST. 
    >>Serpentine etch is often done to match clock lines or source
syncronous 
    >>data lines.
    >>
    >>I did bench testing of serpentine lines, in conjuction with
simulations. 
    >>I ran SPICE simulations using field solved 2d models then measured 
    >>varying serpentine configurations. I examined impedance and
propagation 
    >>delay variations as a function of varying spacing, and signal edge
rate.
    >>
    >>When transmission lines are serpentined 'close' to themselves the 
    >>propagation delay decreases (The lines got faster). For example if I 
    >>compare a straight control line and a sepertined line of the same
length 
    >>on the same layer, with all the fixturing nulled the propagation delay

    >>went from 176ps/in (straight line) to 170 ps/inch (serpentined line). 
    >>You can think of the signal taking a shortcut across the distributed 
    >>self capacitance of the closely serpentined lines.
    >>You might think a propagation delay reduction is good, but I also
found 
    >>the variability of prop velocity increased. I believe the variability 
    >>increased because the capacitive coupling varies based on geometry, 
    >>while normally the dielectric constant variations are the only source
of 
    >>prop delay variability (for a specific rise time and frequency). The 
    >>variability is a small effect but is important when doing source 
    >>syncronous designs.
    >>
    >>
    >>Regards,
    >>Bob
    > 
    > 
    > 
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    -- 
    Robert J. Haller (rhaller@xxxxxxxxxx)
    Principal Consultant
    Signal Integrity Software Inc.
    6 Clock Tower Place, Suite 250
    Maynard, MA 01754
    Phone: (978) 461-0449, ext 15
    
    
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