Vinayak, you are quite welcome. Be sure that the package routes those signals out as well controlled transmission lines. Steve. At 04:53 PM 12/30/2004 +0530, Vinayak AGRAWAL wrote: >Thank you Steve and Vinu > >I am going to add bypass capacitors to the driver. Also I have received >the SPICE model for the package and will simulate the IO along with the >package to find out any remaining problems. > >Thanks for all your help (and kindly send any other comments, subtle or >brutal, that you might not have written till now.) > >Regards >Vinayak > >Vinu Arumugham wrote: >> >>Vinayak, >>Fig. 29 shows four configurations. >> >>Configurations 1,3 and 4 seem to make it easier to meet the differential >>impedance spec. >>Configurations 3 and 4 will still need high speed bypass capacitance >>from the center tap of the termination to ground to meet the >>single-ended impedance spec. >>Configuration 2 will need high speed bypass capacitance from 0.5V to >>ground to meet either spec. >> >>A 100 ps TDR edge is specified for testing. So, it is not clear if a >>large capacitance is required. A 100 ps edge also means the capacitance >>has to be located at the I/O pad. >> >>The differential and single-ended impedance specifications are >>equivalent to the differential and common-mode return loss >>specifications. The return loss specifications, at least in CEI seem to >>be more precise because they cover a specific frequency range. The TDR >>based impedance spec. does not seem to have a low frequency limit. >> >>Thanks, >>Vinu >> >> >>Vinayak AGRAWAL wrote: >> >> >>> >>>Hi Steve >>>Thanks for all the help. >>> >>>If you disagree that my description and SATA spec are different then may >>>be my description was wrong. I'm sorry about that. I am practically >>>copying the second part of the figure (I say "practically" because this >>>is not the complete circuit) in the design. >>> >>> >From your subsequent comments I guess the 0.5V and ground in this >>>design must be tightly coupled. Can you tell me how good are off-chip >>>bypass capacitors for this at say, 500Mbps, 1Gbps and 5Gbps? Providing >>>on-chip bypass will be difficult because of the size of the capacitor >>>required. >>> >>>Regards >>>Vinayak >>> >>> >>> >>>steve weir wrote: >>> >>> >>> >>> >>>> >>>>Vinayak, >>>> >>>>I strongly disagree that what you have described looks like the SATA >>>>spec. The SATA spec drivers are all balanced 50 ohm + 50 ohm outputs >>>>at all times. The current steered model maintains this by shunt, >>>>while the voltage driven models do it in series. You should be >>>>copying the lower part of Figure 29. If you doubt this, build a model >>>>and short the low side 50 ohm resistor. You aren't going to like the >>>>results and neither will your customers. >>>> >>>>Ultimately, from the package boundary to the driver high side, the >>>>return reference and Vcc must be tightly coupled. You can see this by >>>>building a fairly simple SPICE model and inserting a series resistor >>>>or inductor in the coupling path. >>>> >>>>The concept in the old slow days was that Vcc and ground were tightly >>>>coupled inside and outside the package. The return current divided >>>>going back into the package across both rails, which inside the >>>>package were a near AC short. However, fast forward to today, and >>>>that model has serious issues. Any apparent lumped inductance of any >>>>size is going to cause the kind of severe SSO that has Lee pounding >>>>the table, and Chris constantly warns of when signal returns are not >>>>designed correctly. If you build a 6Gbps I/O the way you are talking, >>>>you will become a poster child for the problems Lee has been writing >>>>about in EETimes. >>>> >>>>At high edge rates, you need to carry I/O from the pad through the >>>>package as a well designed transmission line. The reference for that >>>>line should be carefully selected to be relevant at the pad. This >>>>reference needs to be identified so that at the package / PCB >>>>interface, the transmission line is simply continued. Logic common is >>>>usually a good choice. You will still need to have adequate bypassing >>>>inside the IC to maintain stability of the opposing rail. >>>> >>>>Steve. >>>> >>>>At 02:59 PM 12/28/2004 +0530, Vinayak AGRAWAL wrote: >>>> >>>> >>>> >>>> >>>>> >>>>>Thanks Vinu and Patrick >>>>>Unfortunatly I have termination resistance specs and not return loss >>>>>specs. I'm not using a current steering topology and the termination >>>>>resistors are on-chip. The problem is that I'm an ASIC designer, I can >>>>>get package data but I don't have any experince of board design and I >>>>>don't know how to take board effects into account. >>>>> >>>>>The output circuit may seem unusual but I don't think it is too unusual. >>>>>You can find something similar on page 91 of SATA (Serial ATA) 1.0a >>>>>specification (you can download from >>>>><http://www.serialata.org/docs/serialata10a.ZIP>http://www.serialata.org/docs/serialata10a.ZIP, >>>>> >>>>>or see the attached >>>>>page): there are two figures, first is a current steering driver (that >>>>>obviously has a parallel termination) and the second is similar to I'm >>>>>trying to design. This driver works effectively as two single-ended >>>>>drivers (properly synchronised to remove skew). >>>>> >>>>> >>>>>Another doubt I have is does 50ohm termination in a series-temrinated >>>>>single-ended driver really work as a 50ohm termination? Assuming signal >>>>>trace runs over a ground plane, then the return current for high speed >>>>>signals on this trace will run directly underneath the trace on the >>>>>ground plane, AND I ASSUME to the package and to the driver. But on a >>>>>high going transition the driver must get the return current through Vdd >>>>>(or Vtt). Which means it'll have to go through either the supply-ground >>>>>bypass capacitor or some other way. Either way there must be >>>>>siginificant inductances in the path (I'm sure I'm missing something, >>>>>but don't know exactly what) which means termination is not 50ohms, but >>>>>is 50ohms in series with an inductance (and may be some transmission >>>>>lines as well if the bypass capacitor is away from the chip). Will there >>>>>not be siginificant amount of reflections in such a case? >>>>> >>>>>Regards >>>>>Vinayak >>>>> >>>>> >>>>> >>>>> >>>>>Vinu Arumugham wrote: >>>>> >>>>> >>>>> >>>>> >>>>>> >>>>>>While I am no expert, this looks like an unusual output structure. >>>>>>You may be familiar with the OIF CEI standard. These standards for >>>>>>6/11 Gbps signaling, specify the common mode and differential return >>>>>>loss that TX and RX devices must meet with respect to ground. Most >>>>>>high speed differential interconnects at the system level are >>>>>>referenced only to ground. If your structure is able to meet >>>>>>specifications such as CEI, including package and package/board >>>>>>interface effects, they should be fine. >>>>>> >>>>>>Thanks, >>>>>>Vinu >>>>>> >>>>>> >>>>>> >>>>>> >>>>>> >>>>> >>>>>-- Binary/unsupported file stripped by Ecartis -- >>>>>-- Type: image/jpeg >>>>>-- File: sata.jpg >>>>> >>>>> >>>>>-- Binary/unsupported file stripped by Ecartis -- >>>>>-- Type: application/pdf >>>>>-- File: sata.pdf >>>>> >>>>> >>>>>------------------------------------------------------------------ >>>>>To unsubscribe from si-list: >>>>><mailto:si-list-request@xxxxxxxxxxxxx>si-list-request@xxxxxxxxxxxxx >>>>>with 'unsubscribe' in the Subject field >>>>> >>>>>or to administer your membership from a web page, go to: >>>>><//www.freelists.org/webpage/si-list>//www.freelists.org/webpage/si-list >>>>> >>>>>For help: >>>>><mailto:si-list-request@xxxxxxxxxxxxx>si-list-request@xxxxxxxxxxxxx >>>>>with 'help' in the Subject field >>>>> >>>>>List FAQ wiki page is located at: >>>>> >>>>><http://si-list.org/wiki/wiki.pl?Si-List_FAQ>http://si-list.org/wiki/wiki.pl?Si-List_FAQ >>>>> >>>>>List technical documents are available at: >>>>> <http://www.si-list.org>http://www.si-list.org >>>>> >>>>>List archives are viewable at: >>>>> >>>>><//www.freelists.org/archives/si-list>//www.freelists.org/archives/si-list >>>>>or at our remote archives: >>>>> >>>>><http://groups.yahoo.com/group/si-list/messages>http://groups.yahoo.com/group/si-list/messages >>>>>Old (prior to June 6, 2001) list archives are viewable at: >>>>> <http://www.qsl.net/wb6tpu>http://www.qsl.net/wb6tpu >>>>> >>>>> >>>>> >>>>> >>>> >>>> >>>> >>>> >>> >>> >>> >>>-- Binary/unsupported file stripped by Ecartis -- >>>-- Type: image/jpeg >>>-- File: sata.jpg >>> >>> >>>------------------------------------------------------------------ >>>To unsubscribe from si-list: >>><mailto:si-list-request@xxxxxxxxxxxxx>si-list-request@xxxxxxxxxxxxx with >>>'unsubscribe' in the Subject field >>> >>>or to administer your membership from a web page, go to: >>><//www.freelists.org/webpage/si-list>//www.freelists.org/webpage/si-list >>> >>>For help: >>><mailto:si-list-request@xxxxxxxxxxxxx>si-list-request@xxxxxxxxxxxxx with >>>'help' in the Subject field >>> >>>List FAQ wiki page is located at: >>> >>><http://si-list.org/wiki/wiki.pl?Si-List_FAQ>http://si-list.org/wiki/wiki.pl?Si-List_FAQ >>> >>>List technical documents are available at: >>> <http://www.si-list.org>http://www.si-list.org >>> >>>List archives are viewable at: >>> >>><//www.freelists.org/archives/si-list>//www.freelists.org/archives/si-list >>>or at our remote archives: >>> >>><http://groups.yahoo.com/group/si-list/messages>http://groups.yahoo.com/group/si-list/messages >>>Old (prior to June 6, 2001) list archives are viewable at: >>> <http://www.qsl.net/wb6tpu>http://www.qsl.net/wb6tpu >>> >>> >>> >>> >>> >> >> >> >> >>------------------------------------------------------------------ >>To unsubscribe from si-list: >><mailto:si-list-request@xxxxxxxxxxxxx>si-list-request@xxxxxxxxxxxxx with >>'unsubscribe' in the Subject field >> >>or to administer your membership from a web page, go to: >><//www.freelists.org/webpage/si-list>//www.freelists.org/webpage/si-list >> >>For help: >><mailto:si-list-request@xxxxxxxxxxxxx>si-list-request@xxxxxxxxxxxxx with >>'help' in the Subject field >> >>List FAQ wiki page is located at: >> >><http://si-list.org/wiki/wiki.pl?Si-List_FAQ>http://si-list.org/wiki/wiki.pl?Si-List_FAQ >> >>List technical documents are available at: >> <http://www.si-list.org>http://www.si-list.org >> >>List archives are viewable at: >> >><//www.freelists.org/archives/si-list>//www.freelists.org/archives/si-list >>or at our remote archives: >> >><http://groups.yahoo.com/group/si-list/messages>http://groups.yahoo.com/group/si-list/messages >>Old (prior to June 6, 2001) list archives are viewable at: >> <http://www.qsl.net/wb6tpu>http://www.qsl.net/wb6tpu >> >> >> ------------------------------------------------------------------ To unsubscribe from si-list: si-list-request@xxxxxxxxxxxxx with 'unsubscribe' in the Subject field or to administer your membership from a web page, go to: //www.freelists.org/webpage/si-list For help: si-list-request@xxxxxxxxxxxxx with 'help' in the Subject field List FAQ wiki page is located at: http://si-list.org/wiki/wiki.pl?Si-List_FAQ List technical documents are available at: http://www.si-list.org List archives are viewable at: //www.freelists.org/archives/si-list or at our remote archives: http://groups.yahoo.com/group/si-list/messages Old (prior to June 6, 2001) list archives are viewable at: http://www.qsl.net/wb6tpu