[SI-LIST] Serial Link Webinar: Multi-Gigabit Design with Xilinx IBIS-AMI Models

From: Ronda Katz <rkatz@xxxxxxxxxx>
To: si-list@xxxxxxxxxxxxx
Date: Thu, 05 Nov 2009 13:14:26 -0500

All,

SiSoft is hosting a complimentary Serial Link Analysis webinar on how
IBIS-AMI based simulation can help you increase design reliability and
reduce engineering design time for multi-gigabit serial links. This
webinar will be co-presented by Xilinx and SiSoft on Thursday, November
12th at 10 A.M. (PDT), 1:00 P.M. (EDT).

Background:
Next generation communications, networking, and consumer electronics
products are replacing high-speed parallel interfaces with multi-gigabit
serial links as the primary means of moving data within a system.
Conventional signal integrity and timing analysis won’t work for these
links, which require analyzing millions of bits worth of behavior to
reliably determine how jitter, noise and crosstalk affect link operating
margins. The IBIS-AMI modeling specification allows standardized,
interoperable models of SerDes IP that provide the high levels of
simulation performance and accuracy needed to correctly predict the
behavior of serial links. This webinar highlights how IBIS-AMI based
simulation will enable you to increase design reliability while reducing
engineering design time.

To learn more about this webinar or to register visit:

http://sisoft.com/news_events_xilinx_webinar.asp



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[SI-LIST] Serial Link Webinar: Multi-Gigabit Design with Xilinx IBIS-AMI Models

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