[SI-LIST] Re: Serdes Rx Jitter Tolerance
- From: steve weir <weirsi@xxxxxxxxxx>
- To: si-list@xxxxxxxxxxxxx
- Date: Wed, 11 Mar 2015 14:33:17 -0700
In an ideal world your receiver has no errors up to a particular maximum
time interval error. For a given amount of random jitter measured over
some averaging period the measured statistics translate to how
frequently the absolute jitter will exceed some threshold.
Deterministic jitter reduces the margin that is available to random
components. So if you have really measured that you have only 0.2 UI
available to accommodate random jitter, then all other things being
equal you will suffer a higher BER than when you have 0.3 UI available.
Steve.
On 3/11/2015 1:06 PM, Conrad Herse wrote:
> Once again I come with hat in hand to solicit for opinions from those
> who'll indulge me, I'm interested in hearing others opinions on a
> question I've long had which continues to puzzle me.
>
> Suppose I'm using a serdes Rx device on my PCB and the Rx device
> datasheet specifies a total jitter tolerance of JppT=0.6 UI @BER=1e-12.
> Furthermore the datasheet states that JppT is composed of JppD=0.3 UI
> and JppR=0.3 UI (@BER=1e-12). Let's say when I simulate my actual
> channel it in fact does meet the JppT=0.6 UI @BER=1e-12, but the jitter
> composition is JppD=0.4 UI and JppR=0.2 UI. My question: can I expect
> the Rx device to operate at BER<=1e-12 under my actual channel conditions?
>
> My (wishful?) thinking is that "yes" the Rx total jitter tolerance is
> still being met, and that even though I'm exceeding the Rx JppD
> specified in the datasheet the Rx device should operate at BER<=1e-12.
> My rationale being that the jitter composition in the device datasheet
> is merely what was used to characterize the Rx device but it really
> shouldn't matter to the receiver whether the jitter source is
> deterministic or random as long as the total jitter was not exceeded at
> the target BER. As long as the bit transitions for 1e12 bits occur
> <=+-0.3 UI from the optimal transition point the receiver should clock
> the bits in correctly and not take an error, regardless of whether the
> variations came from a random or deterministic source.
>
> Just wishful thinking on my part? I'd certainly prefer to meet BOTH the
> JppD of <=0.3 UI and the JppR of <=0.3 UI, but I've had occurrences
> where JppD is exceeded but not JppT.
>
> Comments appreciated ...
>
> Thanks,
>
--
Steve Weir
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