[SI-LIST] Re: SSTL-2 series termination in DDR Applications
- From: ANAND KURIAKOSE <Anand.Kuriakose@xxxxxxxxxx>
- To: "D. C. Sessions" <dcs@xxxxxxxxxxxxxxxx>
- Date: Fri, 7 Jun 2002 05:02:52 -0700
Hi,
>The memory array section on the motherboard has so much dense
>loading on it that the effective impedance there is closer to
>25 than 50 ohms (thus the ~27 ohm shunt terminators).
>On the other hand, as hard as the board manufacturers try, it's
>almost impossible to reduce the lead-in line from the controller
>to the memory below 50 ohms. The result is a mismatch at the
>first memory device.
>That's why the board manufacturers put ~18-22 ohm resistors
>next to the first DIMM: it matches the ~50 ohm line from the
>controller to the ~25 ohm memory section. On reads, the shunt
>terminator at the end opposite the controller damps outbound
>waves and the series resistor again matches the two lines, so
>that the read signal behaves as reflected-wave.
So thats why we have to place the series resistors closer to the 1st DIMM
rather than near the controller.
But what about the impedance mismatch at the other DIMMs (farther away from
the controller)? How is it taken care of?
Regards,
Anand.
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