[SI-LIST] Re: SSO pushout
- From: "Abhijit Mahajan" <amahajan@xxxxxxxxxxxx>
- To: ha324005@xxxxxxxxx
- Date: Thu, 11 Apr 2002 12:53:19 -0700
Hi Himanshu,
What I was trying to say yesterday is that the capacitive crosstalk
resulting
from adjacent lines switching in opposite direction to the victim, will
rend to
slow down the rise time of the signal on the victim line. Whether this
is even a
factor that can explain SSO pushout, I am not sure.
I had seen some good slides presented by someone from Synopsys explaining
this issue for on chip interconnects.(which are mainly RC). This is
sometimes
dealt with by inverting polarity of victim signal somewhere in the middle
of the
trace. (I cannot clearly remember this).
In case of differential signals, it is best to look at the pair of lines
together. Thus
mutual capacitance and inductance all manifests in diffrential
impedance. The term
odd mode and differential impedace has been dealt with earlier in a
seperate thread.
Abhijit.
Himanshu Arora wrote:
> Mahajan,
>
> Going as per your explaination it looks to me that
> differential signalling will increase the mutual
> capacitance ( which will try to slow the signal ) but
> decrease the inductance ( due to reduced loop area)
> hence improving delay performance. Is this OK?
>
> Sincerely
>
> Himanshu Arora
>
> --- Abhijit Mahajan <amahajan@xxxxxxxxxxxx> wrote:
> >
> > One way to explain this is as follows:
> >
> > The mutual capacitance between the lines doubles
> > when the neighbouring
> > outputs switch
> > in a direction opposite to the victim line. This
> > means that the signal
> > on the victim line now
> > takes longer to rise due to the added capacitance
> > hence increasing the
> > delay.
> >
> >
> >
> >
> >
> > Lin Wee wrote:
> >
> > > Hello:
> > >
> > > I was reading some SI paper that says:
> > >
> > > " SSO pushout is a result of multiple drivers
> > > switching simultaneously. It impacts signal
> > integrity
> > > through adding extra delay to the propagating
> > signal"
> > >
> > > I understand that we'll have more current in the
> > > return path due to simultaneous switching that may
> > > cause ground/plane bounce, but couldn't relate
> > that to
> > > delay.
> > >
> > > Can someone explain this delay, as the text
> > doesn't
> > > explain that ?
> > >
> > > Thanks;
> > > -Lin
> > >
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