[SI-LIST] SSO doubt
- From: Canes Venatici <starsilic@xxxxxxxxx>
- To: si-list@xxxxxxxxxxxxx, si-list@xxxxxxxxxxxxx
- Date: Wed, 4 Apr 2007 01:16:49 -0700 (PDT)
Hi all,
I did SSO simulation using I/O cell spice model, package models, Transmission
line model and i/p model of the receiver.
I could see the quite node is getting noise because of the neighborhood I/O
pads are switching simultaneously. The quite node noise is crossing the
Vil(max), assuming the pad is driven with DC 0v (gnd). But the noise is like
pulses with triangular like shapes. I'm having difficulty in deciding whether
this can cause the problem in the receiver. I mean, at what pulse duration, at
a particular voltage above Vil, can cause false i/p to the receiver.
Like Vil(max), are there any parameters which describes the minimum energy
required to consider as an i/p by the receiver?
Regards
Canes.
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