[SI-LIST] SSO and load capacitance
- From: Jason Young <Jason.Young@xxxxxxxxxxxxxxx>
- To: "si-list@xxxxxxxxxxxxx" <si-list@xxxxxxxxxxxxx>
- Date: Tue, 2 Aug 2011 11:01:06 +0100
Dear Experts,
I have read a couple of documents are from silicon IP vendors discussing the
number of power/ground pads needed to meet SSO requirements for a given number
of output drivers. These documents mention that worse case conditions for SSO
are with the smallest output load capacitance. At first this seems counter
intuitive. My initial reasoning would be that a larger capacitance would
present a lower impedance load and hence greater dI/dt, greater IR drop and
greater supply rail bounce. Could you please help me understand?
Regards,
Jason
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