Hi All, We have two positions open in the Semiconductor Packaging and PCB Technology Group. Detailed URLs are available at the end of this post, the job requisition numbers are IRC2059663, IRC2059666 and more info can be found at http://www.oracle.com/us/corporate/careers/index.html Do send me an email if you need further information. Thanks Sreemala ------------------------------------------------------------------------ Brief Posting Description ========================= Signal Integrity and Power Integrity positions (Location is Santa Clara or San Diego) This positions will address package/Module design and Signal/Power integrity challenges in 25G and beyond designs for high end microprocessors as well as ASICs. On some projects, the positions need to be involved with End-to-End power integrity and channel analysis including I/O, Pkg, backplanes etc. Responsibilities include: ------------------------- * Use analytical and simulation tools to define package/module design requirements (technology, stackup etc) in the project conception stages and negotiate with chip/system teams on product specification * Develop multi-signal package/module models over 50 GHz bandwidth and develop suitable test structures for model to measurement correlation. Come up with performance metrics for the various package technologies in order to meet 25G signal requirements * Performing Power Integrity analysis for core as well as IO and generating power delivery network requirements with emphasis on model to measurement correlation * Measure power distribution impedance in a system and demonstrate ways to map performance for various package/module technologies * Support internal customers (chip,system teams) regarding package/module specifications, models and simulations * Be on the lookout for new technologies (package/interposer/module technologies, capacitors, test structures, debug tools etc) that would enhance package design cost/performance benefits. Work with vendors to integrate emerging technology into packages. Skills: ------- * College Degree of BS/MS in electrical engineering with coursework in Electromagnetics. Ph.D preferred. * About 7 years experience in signal integrity and package/PCB electrical design * Familiarity with 2D/3D EM package design tools, Matlab, Cadence package design tool is a must * Mentor junior package designers in the group * Good knowledge of SerDes design and package/PCB layout constraints * Excellent analytical, communication and documentation skills URLs ---- https://irecruitment.oracle.com/OA_HTML/OA.jsp?page=/oracle/apps/irc/candidateSelfService/webui/VisVacDispPG&akRegionApplicationId=821&transactionid=1506082380&retainAM=Y&addBreadCrumb=S&p_svid=2059663&p_spid=2111985&oapc=17&oas=rlkV7Ld9Dql_fgkYScGDeA.. https://irecruitment.oracle.com/OA_HTML/OA.jsp?page=/oracle/apps/irc/candidateSelfService/webui/VisVacDispPG&akRegionApplicationId=821&transactionid=1506082380&retainAM=Y&addBreadCrumb=S&p_svid=2059666&p_spid=2111988&oapc=11&oas=YM_pRA4TY5wzPvedjOy6NA.. ------------------------------------------------------------------ To unsubscribe from si-list: si-list-request@xxxxxxxxxxxxx with 'unsubscribe' in the Subject field or to administer your membership from a web page, go to: //www.freelists.org/webpage/si-list For help: si-list-request@xxxxxxxxxxxxx with 'help' in the Subject field List forum is accessible at: http://tech.groups.yahoo.com/group/si-list List archives are viewable at: //www.freelists.org/archives/si-list Old (prior to June 6, 2001) list archives are viewable at: http://www.qsl.net/wb6tpu