[SI-LIST] Re: SI with IBIS models for ECL devices.

  • From: "Scott McMorrow" <scott@xxxxxxxxxxxxx>
  • To: scott@xxxxxxxxxxxxx
  • Date: Tue, 14 Jan 2003 14:51:39 -0800

Dave,  

And to follow up, whether or not the pins  of the ON Semi MC100EL07 are 
designated as differential, they should function correctly in an IBIS 
simulator with the proper bias termination for the open emitter 
transistors. Tom has indicated that they currently work just fine in 
Hyperlynx 6.1 and the Beta 7.0 simulators.

It is, however, possible that there are problems with earlier releases 
of Hyperlynx.  My understanding is that the IBIS driver simulation 
algorithms have changed significantly in the past year.

best regards,

scott

-- 
Scott McMorrow
Teraspeed Consulting Group LLC
2926 SE Yamhill St.
Portland, OR 97214
(503) 239-5536
http://www.teraspeed.com



Scott McMorrow wrote:

>Dave,
>
>Since this is a standard ECL device, the outputs can be used either in a 
>differential or a single-ended fashion.  There is no requirement to use 
>the device for differential drive.  It is often common practice to use 
>the outputs as just true and complement signals, and is often the case 
>with ECL logic gates, which this is.
>
>I would agree with your comment if this were designed specifically for a 
>differential driver application.  However, in this case, that might 
>limit the usability of this model in simulation.
>
>best regards,
>
>scott
>
>
>David Fogel wrote:
>
>  
>
>>I just looked at the model. It may be working fine in your test bench, but
>>if you look closely you will see that it's incomplete (or wrong, depending
>>on your point of view). The output 'Diff Pin's are not declared as such.
>>David Fogel.
>>
>>-----Original Message-----
>>From: si-list-bounce@xxxxxxxxxxxxx
>>[mailto:si-list-bounce@xxxxxxxxxxxxx]On Behalf Of Tom Dagostino
>>Sent: Tuesday, January 14, 2003 1:21 PM
>>To: dfogel@xxxxxxxxxxxxxxx; v-paliakara2@xxxxxx; si-list@xxxxxxxxxxxxx
>>Subject: [SI-LIST] Re: SI with IBIS models for ECL devices.
>>
>>
>>
>>I tried the ON MC100EL07 in Hyperlynx and it worked just fine.
>>
>>Tom Dagostino
>>Teraspeed Consulting Group LLC     Teraspeed Consulting Group LLC
>>2926 SE Yamhill St.                Device Modeling Division
>>Portland, OR 97214                 13610 SW Harness Lane
>>                                  Beaverton, OR 97008
>>http://www.teraspeed.com           503-430-1065
>>tom@xxxxxxxxxxxxx
>>
>>
>>-----Original Message-----
>>From: si-list-bounce@xxxxxxxxxxxxx
>>[mailto:si-list-bounce@xxxxxxxxxxxxx]On Behalf Of David Fogel
>>Sent: Tuesday, January 14, 2003 10:52 AM
>>To: v-paliakara2@xxxxxx; si-list@xxxxxxxxxxxxx
>>Subject: [SI-LIST] Re: SI with IBIS models for ECL devices.
>>
>>
>>
>>Hi,
>>I tried to use the IBIS models for ECL devices from Onsemi. My conclusion
>>was that it's a waste of time. Some have syntax!! bugs, some were generated
>>with 500R load resistors which is wrong and some were just plain wrong.
>>Also, can HyperLynx handle ECL devices, they behave differently than CMOS.
>>David Fogel
>>
>>-----Original Message-----
>>From: si-list-bounce@xxxxxxxxxxxxx
>>[mailto:si-list-bounce@xxxxxxxxxxxxx]On Behalf Of Paliakara, Vinod
>>Sent: Tuesday, January 14, 2003 3:57 AM
>>To: si-list@xxxxxxxxxxxxx
>>Subject: [SI-LIST] SI with IBIS models for ECL devices.
>>
>>
>>Hi,
>>
>>I am doing SI analysis using IBIS models of ECL devices from Onsemi.
>>
>>For the MC100EL35D & MC100EL07 devices,
>>In HyperLynx, the logic 1 level is coming up properly to approx -0.7V but
>>during the logic 0
>>interval, the pin just oscillates wildly +/- 20V or more.
>>
>>For the MC100EL12 buffer,the fall time from logic 1 to 0 is around 10ns ( vs
>>0.8 ns in the ibis model ).
>>while the rise time looks allright at 1.5ns
>>
>>Can anyone tell me what could be the problem?
>>
>>Thanks,
>>Vinod
>>
>>
>>
>>
>>
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>>
>
>  
>



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