[SI-LIST] Re: SI Simulation of GHz signals

  • From: "Rich Peyton" <p2rich@xxxxxxxxxxxxx>
  • To: <Suresh.Subramaniam@xxxxxxxxxx>
  • Date: Thu, 19 Aug 2004 07:33:42 -0400

Seems nice but you need Ansoft software package to use this "Free =
Virtual
Design Kit"=20

-----Original Message-----
From: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx] =
On
Behalf Of Suresh Subramaniam
Sent: Wednesday, August 18, 2004 8:00 PM
To: Suresh Subramaniam
Cc: clifford@xxxxxxxxxxxxx; si-list@xxxxxxxxxxxxx
Subject: [SI-LIST] Re: SI Simulation of GHz signals


Hello All,
A couple of weeks ago I had indicated that the

*Gigabit Virtual Design Kit*=20
<http://www.xilinx.com/products/design_resources/highspeed_design/resourc=
e/s
i_gig.htm>=20
(in case the hypelink does'nt work  - use=20
http://www.xilinx.com/products/design_resources/highspeed_design/resource=
/si
_gig.htm)=20
will be available through a link on our website. The link is now active=20
and the kit is available for free. I have included the original message=20
below for details on contents of the kit.

Please feel free to e-mail me if you have comments or questions.

Thanks
Suresh


Suresh Subramaniam wrote:

> Clifford,
>
> Xilinx has a number of kits to help customers with needs similar to
> yours. Most recently, Xilinx teamed with Ansoft to create a "virtual=20
> test board" in simulation equivalent to the Virtex II Pro-X test=20
> board. We have demonstrated exteremly accurate correlations between=20
> simulation and measurement for a channel comprising the BGA package,=20
> microstrip segments, differential vias and stripline segments as well=20
> as SMA connectors for 10 Gb/s data rates. S-parameter as well as=20
> parameterized models of the transmission lines and differential vias=20
> will be available through our  SI central=20
>
<http://www.xilinx.com/products/design_resources/highspeed_design/groupin=
g/s
ignal_integrity.htm>=20
> website within a week or so. (The design kit will include HFSS and=20
> Ansoft Designer models for the transmission path including the FPGA=20
> package, transmission lines, differential via, and connectors.  The=20
> kit will also include the full, 10 gigabit channel circuit and system=20
> model, ready to solve, in Ansoft Designer.)   A white paper that=20
> explains this work will also be available through the link above.
>
> Also, the Special XCell On-Line for Signal Integrity Series features
> more than 10 technical articles from a number of signal integrity=20
> experts in the industry to explore tools and methods you can use to=20
> combat signal and power integrity distortions throughout your=20
> high-speed PCB development.
>
> The Special XCell On-Line for Signal Integrity Series is now available =

> at http://www.xilinx.com/publications/xcellonline/xc_si49.htm
>
> Also check out the SI seminar series that Xilinx is hosting at
>
> http://www.xilinx.com/ise/alliance/si_seminar.htm
>
> Hope that helps.
>
> Regards,
> Suresh
> =20
>
> Clifford van Dyk wrote:
>
>> Hello
>> I would like to perform reliable simulation of GHz signals (up to=20
>> 3.125GHz), specifically Xilinx RocketIO. I would like to include in=20
>> the simulation the effects of the following:
>> Driver->PCB trace (incl. vias)->connector->cable->connector->PCB
>> trace(incl. vias)->Receiver
>>
>> The models that I have obtained from the various vendors are HSPICE=20
>> models. I have evaluated two of the most recommended S.I. toolchains: =

>> Mentor G. HyperLynx and Cadence Spectraquest. Both tools use HSPICE=20
>> as the simulation engine, and essentially act as a front-end gui to=20
>> HSPICE, as well as extracting the PCB trace/via models. My=20
>> experiences thusfar with both tools have not been good. Anything but=20
>> the most simplistic of traces causes the tools to either crash or=20
>> take rediculous time to process (of the order of hours for even a=20
>> simple net). A further issue is that both of these tool vendors claim =

>> that the HSPICE simulator is not necessary, and that the simulation=20
>> can be performed without it, but practically this is not the case,=20
>> due to a lack of availability of reliable models in anything other=20
>> than HSPICE format. The conversion from HSPICE to any of the custom=20
>> modelling types is also, in my opinion, non-trivial and potentially=20
>> an extremely tedious manual process.
>>
>> I believe that S-Parameter based simulation provides much faster=20
>> simulation, but again there is a lack of availability of S-Parameter=20
>> models.
>>
>> Can anyone recommend a method for simulating the above signals that=20
>> is simple, robust and reliable, or is the simulation of such signals=20
>> still premature? Coming from a HW design background, I am fairly new=20
>> to S.I., but it seems surprising that  there is no industry-standard=20
>> modelling type (equivalent of IBIS) that cable/connector vendors will =

>> provide, but maybe this level of simulation is in its infancy, and=20
>> S-Parameter models will emerge as the standard?
>>
>> Is the simulation of such signals entirely necessary? I am dubious=20
>> about the reliability of the results of such simulations, and I am=20
>> wondering whether it is not more practical to just take all the=20
>> precautions possible and hope for the best!
>>
>> Please let me know if you have any advise, or a good solution to my
>> dilemma!
>>
>> Kind regards,
>> Clifford
>>
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> --=20
>  / 7\'7 Suresh Subramaniam        suresh.subramaniam@xxxxxxxxxx
>  \ \    Xilinx                Telephone: 408-559-7778
>  / /    2100 Logic Drive      Direct:    408-879-6172
>  \_\/.\ San Jose, CA   95124  FAX:       408-377-9013
> =20
>


--=20
--
 / 7\'7 Suresh Subramaniam        suresh.subramaniam@xxxxxxxxxx
 \ \    Xilinx                Telephone: 408-559-7778
 / /    2100 Logic Drive      Direct:    408-879-6172
 \_\/.\ San Jose, CA   95124  FAX:       408-377-9013




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