There is an immediate senior level SI opening here at Marvell, the following are the job description.=20 The position is unique in the sense that the candidate will get exposure to addressing SI issues ranging from on die, on package and on board. This position is located Santa Clara, California. Wei Zhou HW Engineering Manager Job description - High speed serial link simulation and characterization - Die/Package/Board SI simulation and characterization to ensure good signal integrity - Supporting customer trouble shooting SI related issues, provide guidance and solution - High speed serial interface validation - Participate in SATA/SAS/FC committee task force activities Job requirement - MS in EE or related field - 4+ direct and hands on experience in SI field, someone with strong background in DDR or serdes will be highly desired. - Familiar with simulation tools such as HFSS/Sigrity/Hspice or equivalent - Hands on experience with high speed scope, BERT, VNA etc - Comfortable working in hardware engineering environment doing debugging, probing, board bring up and characterization ------------------------------------------------------------------ To unsubscribe from si-list: si-list-request@xxxxxxxxxxxxx with 'unsubscribe' in the Subject field or to administer your membership from a web page, go to: //www.freelists.org/webpage/si-list For help: si-list-request@xxxxxxxxxxxxx with 'help' in the Subject field List technical documents are available at: http://www.si-list.net List archives are viewable at: //www.freelists.org/archives/si-list or at our remote archives: http://groups.yahoo.com/group/si-list/messages Old (prior to June 6, 2001) list archives are viewable at: http://www.qsl.net/wb6tpu