[SI-LIST] Re: SDRAM read problem
- From: "Calvo, Oscar A (FL51)" <Oscar.A.Calvo@xxxxxxxxxxxxx>
- To: peter.qiu@xxxxxx, si-list@xxxxxxxxxxxxx
- Date: Mon, 21 Nov 2005 13:58:48 -0700
Peter,
Sounds like you also need series terminations at the output of the SDRAM
before the lines go to the bus transceiver.
Oscar
-----Original Message-----
From: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx] On
Behalf Of Qiu, Peter (GE Consumer & Industrial, consultant)
Sent: Friday, November 18, 2005 10:31 AM
To: si-list@xxxxxxxxxxxxx
Subject: [SI-LIST] SDRAM read problem
Hi,=20
I have a embedded system with a microprocessor, a SDRAM(SDR), and a bus =
transceiver chip reside on the data bus(behind the bus transceiver, =
there are other peripherals). They are in daisy-chain mode, i.e. the =
data bus signals from microprocessor first reach the SDRAM, then go to =
the bus transceiver. I put the termination resistors close to the =
microprocessor side. During the write operation to the SDRAM, the signal =
quality is ok. While during the read from the SDRAM, the signal on the =
microprocessor side suffers excessive overshoot and undershoot. May I =
know what is the better solution to terminate this kind of bi-direction =
bus? if I also put the termination resistor near the SDRAM end, does it =
affect the read/write operation to the transceiver chip behind the =
SDRAM? Thanks.
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