Dear Experts, Recently I read the SATA spec, the min differential output voltage is defined 400mV for all Gen1 & Gen2 types (i/m/x) that shocks me. It means that trace length should be as short as possible for current project and long backplane is not long (interconnect loss budget is changed from 9.275dB to 3.255 dB for 2x). Who can tell me the story/history of the electrical specification? Note 1: <Serial ATA II: Electrical Specification, rev. 1.0, page 44 & 47> 1i 1m 1x 2i 2m 2x Min TX 400 500 800 400 500 800 mV Min RX 325 240 275 275 240 275 mV <Serial ATA Revision 2.5, page 135 & 138> 1i 1m 1x 2i 2m 2x Min TX 400 400 400 400 400 400 mV Min RX 325 240 275 275 240 275 mV Note 2: i: PC motherboard to device application m: Short backplane and external desktop application x: Long backplane and system-to-system application Sincerely Cortex Chen ³¯¥ÃªN SI Section, ESBU Quanta Computer Inc. No. 211, Wen Hwa 2nd., Kuei Shan Hsiang, Tao Yuan Shien, Taiwan. TEL: 886-3-3272345 ext. 11710 FAX: 886-3-3973614 ------------------------------------------------------------------ To unsubscribe from si-list: si-list-request@xxxxxxxxxxxxx with 'unsubscribe' in the Subject field or to administer your membership from a web page, go to: //www.freelists.org/webpage/si-list For help: si-list-request@xxxxxxxxxxxxx with 'help' in the Subject field List FAQ wiki page is located at: http://si-list.org/wiki/wiki.pl?Si-List_FAQ List technical documents are available at: http://www.si-list.org List archives are viewable at: //www.freelists.org/archives/si-list or at our remote archives: http://groups.yahoo.com/group/si-list/messages Old (prior to June 6, 2001) list archives are viewable at: http://www.qsl.net/wb6tpu