touchy, touchy, touchy. Come on kids, play nice. --- steve weir <weirsi@xxxxxxxxxx> wrote: > John, since you assert that you do not believe my conclusions, then surely > you must be able to articulate the exception that you take to my methods of > reaching my conclusions, as I have of yours. > > Despite my best efforts to correlate: theory, field solver results, and > careful experiment design, and to subject the entire body to expert peer > review, you categorically discount my results relying on your own, very > different experiment design. What I have yet to hear is any technical > argument against my methods, or evaluations. Have you reproduced my > experiments with different results? Do you see some flaw in my theory, > experiment design, or data extraction? If so, I would greatly appreciate > hearing about it. If anyone can show me wrong, and it has certainly been > known to happen, I am happy for the education. > > If you believe that I have misinterpreted your experiments and data > extraction and believe that my criticisms of them are not well founded, > then everyone will be well served by you detailing my errors. I believe I > have been very clear expressing the problems that I find with your methods > and how they account for the differences in our results. By my estimation > your experiments are under reporting the inductance of all three > configurations tested ( 0603 2 via, 0603 4 via and AVX 0612 IDC ). Most > troubling is that I believe you under report the 4 via 0603 by almost 2:1 > for the long via cases. This completely turns your conclusions upside > down. So do you care to show why I am off-base? How do you account for > any of the troubling issues in your reported data that I have > outlined? How do you account for the sources of errors in your experiments > that I have detailed? > > Steve. > At 10:59 AM 5/31/2005 -0700, John Zasio wrote: > >Steve, > >I am not embarrassed at all. I have presented data measured on > >small test boards and used this data to design systems. The > >data from single capacitor measurement was used to design the > >impedance profile for many large high power boards. It has been > >verified with measurements of the impedance profile on these > >boards and more importantly on the power plane noise on > >functioning hardware. I have never had a single instance of a > >system that did not function because of power supply noise or > >signal integrity issues. > > > >This forum is to allow experienced engineers like you and I > >to offer advice to those who have less experience. I feel like it > >is pay back to all those that have helped me. My advice is > >to not trust manufacturers datasheets for all the parameters > >needed to build high speed systems. Build test structures to > >create the models necessary to do your design. > > > >The manufacturers of capacitors generally present accurate data > >on the equivalent series inductance. However they are giving you > >the difference between a short across their test fixture and the > >inductance with the capacitor replacing the short. This is of > >little interest to me. What I care about is how the capacitor > >functions on PC boards with the same stackup that I must use for > >the product. The via inductance on typical boards is much higher > >than the manufacturer's value for the capacitor and this board via > >inductance dominates. > > > >I have chosen not to use the X2Y capacitors on my boards. For > >me they do not meet my requirements as well as 0402 devices. > >I admit that it takes 50% more devices but they are smaller than > >the X2Y, cost less, and use same total number of vias. You > >present an opinion that the X2Y is the right choice and only > >choice. I present an opinion that there are other choices and I > >think the people asking for advice should understand that there > >is more than one solution. > > > >John Zasio > > > >steve weir wrote: > > > > > John, as we discussed, there are both problems with your measurement > > > methods and your conclusions that are evident based on your writings. > > > > > > Let's take a look at your reported data points as reported in Lee's > > > and your book: > > > > > > I have formatted the following table using spaces so just view in a > > > monospace font like courier new to get the columns to line up: > > > > > > Table values reported from "Right the First Time" Ritchey w/ Zasio pp > > > 143 Table 35.1: > > > ===================================== > > > Vendor AVX AVX AVX | > > > Case 0603 0603 0612 IDC | > > > Cap 100nF 100nF 100nF | > > > Vias 2 4 8 | > > > Cesl 950pH 460pH 151pH | > > > | Extracted > > > Via length ESL ESL ESL | L/mil L/mil L/mil > > > 13.5 1190 580 230 | > > > 28.8 1460 720 310 | 17.6 9.2 5.2 > > > 62.5 2060 1010 500 | 17.8 8.6 5.6 > > > 77.5 2330 1150 580 | 18.0 9.3 5.3 > > > |Ave 17.8 9.0 5.4 > > > |*vias 35.6 36.0 43.2 > > > ================================================================= > > > > > > > > > > > > > > From this data, you offered the conclusion: > > > > > > "The Length Factor (Lf) of 35.5 pH/mil works for all 0603 size > > > capacitors with either two or four vias." > > > > > > In reference to the equation: > > > > > > Cesl = ESLcap + Via_length * Length_Factor / Number_of_vias > > > > > > In other words, vias do not interact. > > > > > > Your first clue that something is wrong should have been the notion > > > that four vias mounted on the corners of a 50mil / side box should > > > exhibit 1/2 the inductance of just one pair on one side ( pg 142, > > > fig.35.5 ). Solenoids still work even if loosely wound. > > > > > > Your second clue that there is a problem with your beliefs, data or > > > both should have been that inductance of the interdigitated vias on > > > AVX IDC went up instead of down compared to conventional capacitors, > > > without any further explanation. > > > > > > Your third clue should have been that your extracted inductance per > > > unit length does not match published and verified derivations, > > > including those readily available as published by Dr. Johnson, which > > > are themselves readily verifiable using a physics text such as > > > Halliday and Resnick to apply the method of Biot and Savart. You > > > report 35.5pH/mil for 10mil via pairs on 50 mil centers. The correct > > > value should be about 46.8pH, over 30% higher. How do you reconcile > > > that your vias should be better than theory? > > > > > > Your fourth clue should have been that your extraction for the IDC raw > > > component inductance came out 150pH, when those parts as reported by > > > both AVX and independent measurement show up as very close to 60pH. > > > > > > So how did your experiments go bad? > > > > > > First, your fixture, an approx. 4" x 10" board sets the RF source and > > > the receiver close together at the far end of a narrow aspect ratio > > > board, and the target capacitor positions essentially along the length > > > of that board. This minimizes the incremental transfer impedance > > > changes for the various capacitor positions that you used on > > > approximate 2.5 inch spacings. > > > > > > Second, the tests that you did use only a single capacitor at a time > > > on that platform with 3mil dielectric plane pairs. The impedance of > > > the mounted capacitors is so high compared to the capacitors that you > > > erroneously concluded that they contribute a negligible amount of > > > impedance. This is true for the tests, but is false for any system > > > requiring anything but an late 1980's early 1990s impedance profile. > > > > > > Third, the test fixture attempts to derive inductance values for > > > attachments to planes at various depths, but where apparently, all the > > > planes have been joined together at the RF generator / spectrum > > > analyzer connections in the upper left hand corner of the board. > > > Since there is no pictorial evidence, nor any comment about the issue, > > > I doubt that you did anything to either insure that the instrument > > > connections to each plane formed contiguous transmission lines, nor > > > found a way to deembed the parasitics of those attachments. This > > > means that your measurements were colored in two important ways: > > > > > > 1. The parasitic inductance of the attachments increased the apparent > > > insertion loss above the actual values, and tended to equalize all of > > > the measurements. > > > 2. The measurements reflected the distance from the uppermost plane in > > > the entire board to the uppermost plane that any given capacitor > > > attached to. > > > > > > Your experiments measured lots of combined effects that you failed to > > > account for, leading you to very faulty conclusions. For unknown > > > reasons you discounted, or ignored the prominent warnings readily > > > visible in your data. I hope for your sake and the sake of customers > > > of you or Lee that your faulty beliefs and conclusions have not been > > > relied upon. > > > > > > I am sorry if all this is embarrassing to you in a public forum, but > > > as you know, I have offered multiple times to show both you and Lee > > > how you have gone wrong privately. > > > > > > Steve. > > > > > > At 09:11 AM 5/28/2005 -0700, John Zasio wrote: > > > > > >> Steve, > > >> > > >> I have come to the opposite conclusion than you in regard to the > > >> benefit of > > >> IDC or X2Y capacitors for decoupling. In order to obtain the data for my > > >> conclusions I build small multi-layer test boards and measure several > > >> caps > > >> with varying via length to the power planes. What is important to me > > >> is the > > >> total effective inductance of the mounted capacitor. > > >> > > >> The most recent test board has 26 layers and is 100 mils thick. I > mounted > > >> 0402 capacitors with 4 vias and X2Y capacitors with 6 vias. Power plane > > >> one (PP1) is closest to the surface of the board and PP6 is near the > > >> bottom. > > >> Measured ESL is as follows: > > >> > === message truncated === Thomas E. McGonigle 8305 48th Avenue College Park, MD 20740-2401 tmcgonigle@xxxxxxxx 301-441-1175 __________________________________________________ Do You Yahoo!? Tired of spam? Yahoo! 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