[SI-LIST] Re: Routing guidelines for 3.12Gbps LVDS pairs

  • From: Richard P EVANS <rich.evans@xxxxxx>
  • To: <si-list@xxxxxxxxxxxxx>
  • Date: Tue, 20 Oct 2009 09:55:28 -0500

-----Original Message-----
From: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx] On
Behalf Of Lee Ritchey
Sent: Tuesday, October 20, 2009 9:33 AM
To: icer world; Paul Hurst; si-list@xxxxxxxxxxxxx
Cc: chundi srikanth; Lambert Simonovich
Subject: [SI-LIST] Re: Routing guidelines for 3.12Gbps LVDS pairs

Guard traces do not improve performance.  Instead, the complicate layout. 
What will it take to get this myth put to rest?


> [Original Message]
> From: icer world <icermail@xxxxxxxxx>
> To: Lee Ritchey <leeritchey@xxxxxxxxxxxxx>; Paul Hurst
<paul@xxxxxxxxxxxxxxxxxxxxxx>; <si-list@xxxxxxxxxxxxx>
> Cc: chundi srikanth <chundis@xxxxxxxxx>; Lambert Simonovich
<bertsimonovich@xxxxxxxxxx>
> Date: 10/19/2009 9:36:34 PM
> Subject: [SI-LIST] Re: Routing guidelines for 3.12Gbps LVDS pairs
>
> 1) length matching must be consided  seriously and mismatch should be
below 100mils;
> 2) generally speaking,the differential pairs impedance must keep 
> 100ohm
and   the ground return path must not be choped ;
> 3) the ground guarding trace should keep two times of differential 
> trace
width away from the differantial pairs,which can not influences the      
differential pairs impedance and avoid crosstalk issues;
> 4) using serial and parallel matching resistors simultaneously   for
debug ;
> 5) changing layers is not expected,but if necessary ,you should place 
> a
groung via near the signal via ;
> the above is just an advice ,and you'd better do a simulatiom to 
> decide
the rules of matching resistors and crosstalk;
>
>
>
> ________________________________
> From: Lee Ritchey <leeritchey@xxxxxxxxxxxxx>
> To: Paul Hurst <paul@xxxxxxxxxxxxxxxxxxxxxx>; si-list@xxxxxxxxxxxxx
> Cc: chundi srikanth <chundis@xxxxxxxxx>; Lambert Simonovich
<bertsimonovich@xxxxxxxxxx>
> Sent: Mon, October 19, 2009 11:46:36 PM
> Subject: [SI-LIST] Re: Routing guidelines for 3.12Gbps LVDS pairs
>
> Length matching does not need to be tighter than 100 mils.
>
> It is not necessary to back drill vias used to connect component pins 
> to traces or to change layers.  The 0.6 pF or so capacitance does not 
> adversely affect the signals at this data rate.
>
> It is not necessary to put "ground" vias next to routing vias as long 
> as the PDS is well designed."
>
> "Guard"  traces have no value.  Proper spacing to avoid crosstalk does. 
> The "rule of thumb" for spacing given, while crude, is not far off.
>
> Lee Ritchey
>
>
> > [Original Message]
> > From: Paul Hurst <paul@xxxxxxxxxxxxxxxxxxxxxx>
> > To: <si-list@xxxxxxxxxxxxx>
> > Cc: chundi srikanth <chundis@xxxxxxxxx>; Lambert Simonovich
> <bertsimonovich@xxxxxxxxxx>
> > Date: 10/18/2009 5:45:08 PM
> > Subject: [SI-LIST] Re: Routing guidelines for 3.12Gbps LVDS pairs
> >
> > Srikanth,
> >
> > Additional to Bert's comments:-
> >
> > 1) Match the lengths of the pairs exactly
> > 2) Use a solid ground return
> > 3) Avoid stubs by design or by using stub-drilling
> > 4) If you have vias in the path use a small drill and a large 
> > anti-pad
and
> > place a ground via next to each signal via
> >
> > Regards
> >
> > Paul
> >
> > -----Original Message-----
> > From: si-list-bounce@xxxxxxxxxxxxx 
> > [mailto:si-list-bounce@xxxxxxxxxxxxx]
> On
> > Behalf Of Lambert Simonovich
> > Sent: 16 October 2009 21:57
> > To: 'chundi srikanth'; si-list@xxxxxxxxxxxxx
> > Subject: [SI-LIST] Re: Routing guidelines for 3.12Gbps LVDS pairs
> >
> >
> > Srikanth,
> >
> > A rough rule of thumb is greater than 3 times trace width separation
> between
> > pairs. Using a 2D field solver will ultimately give you the 
> > crosstalk coupling factor for the exact geometry in your stackup, 
> > and dictate the routing rules you need to follow to satisfy your noise
budget.
> >
> > Adding GND guarding will more often than not present more issues 
> > than it solves. You should stitch these guard traces at regular 
> > intervals approximately 1/10 of the wavelength of the highest 
> > frequency component
of
> > the aggressor signal to avoid it from resonating and coupling noise 
> > back onto other adjacent traces. This further reduces routing 
> > density of the board. By the time you factor in the additional space 
> > of one trace width between the guard trace and Diff pair, plus the 
> > additional via
stitching,
> > you will find you are already at 3 times separation between pairs 
> > and
you
> > would gain back more real estate.
> >
> > Regards,
> >
> > Bert Simonovich
> >
> >
> >
> >    
> >
> > -----Original Message-----
> > From: si-list-bounce@xxxxxxxxxxxxx 
> > [mailto:si-list-bounce@xxxxxxxxxxxxx]
> On
> > Behalf Of chundi srikanth
> > Sent: October-16-09 12:40 PM
> > To: si-list@xxxxxxxxxxxxx
> > Subject: [SI-LIST] Routing guidelines for 3.12Gbps LVDS pairs
> >
> > Hi Techies,
> > We have a 12-layer board in which we have lot of differential LVDS 
> > pairs operating at several hundreds MHz. And we have SERDES signals
> (differential
> > TX & RX pairs) operating at CPRI rate-4 i.e., 3Gbps. So can you just
share
> > me some inputs on exactly what are the guidelines to be followed  
> > while routing these signals. And is GND gaurding between the 
> > differential
pairs
> > improve the SI?Please share or refer me any documents in which i can 
> > get Good information on High-Speed design guidelines.
> >
> > Thanks
> >
> > With Best Regards
> > Srikanth
> >
> >
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