[SI-LIST] Re: Right Angle Bends

  • From: Julian Ferry <julian.ferry@xxxxxxxxxx>
  • To: Scott McMorrow / Teraspeed <scott@xxxxxxxxxxxxx>, "si-list@xxxxxxxxxxxxx" <si-list@xxxxxxxxxxxxx>
  • Date: Fri, 15 Jul 2011 20:53:28 +0000

That's a good point.

Who's that guy who always says "It depends?".....  



-----Original Message-----
From: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx] On 
Behalf Of Scott McMorrow
Sent: Friday, July 15, 2011 4:39 PM
To: si-list@xxxxxxxxxxxxx
Subject: [SI-LIST] Re: Right Angle Bends

Julian

Actually, it depends on the frequency and the trace thickness, since 
capacitive coupling on the sidewall of the trace at the corner can cause 
a net decrease in capacitance at some frequencies.


Scott McMorrow
Teraspeed Consulting Group LLC
121 North River Drive
Narragansett, RI 02882
(401) 284-1827 Business
(401) 284-1840 Fax

http://www.teraspeed.com

Teraspeed(r) is the registered service mark of
Teraspeed Consulting Group LLC


On 7/15/2011 4:05 PM, Julian Ferry wrote:
> OK, looks like I made one little not-so minor mistake in my previous email:
>
> The capacitance goes UP, the inductance goes DOWN.
>
> Sorry for any confusion I might have caused!
>
> Julian Ferry
> High Speed Engineering Manager
> Samtec, Inc
>
> -----Original Message-----
> From: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx] On 
> Behalf Of Julian Ferry
> Sent: Friday, July 15, 2011 3:48 PM
> To: Brad Brim; 'Jeff Walden'; si-list@xxxxxxxxxxxxx
> Subject: [SI-LIST] Re: Right Angle Bends
>
>
> I think one of the problems here is that like with most myths or urban 
> legends, there is a kernel of truth to it.
>
> It is pure, unarguable physics that the capacitance will go down and the 
> inductance will go up in a right angle bend.  The question is whether that 
> change matters in a particular application.
>
> For some applications, like in high power microwave or RF applications, this 
> effect can be significant enough relative to other factors that it is 
> definitely worth worrying about.
>
> But in the grand scheme of things in the current SI world, this change is way 
> down on the list of potential problems. It is effectively swamped out by many 
> other effects (like our relatively crappy connectors, for one example...)
>
> I think these guys wrote a pretty decent little paper with some math that can 
> help determine whether you might need to worry about bends.
>
> http://www.millertechinc.com/pdf_files/mti_tn063_microstrip_right_angle_bends.pdf
>
>
> Also keep in mind that we in the SI world are mostly dealing with pulsed 
> signals, where a large portion of the energy is contained in the lower 
> frequency components.  The excess capacitance will only affect the very high 
> frequency components. But in the microwave environment, it's all about the 
> high frequency signal, so a bend can be a much greater concern.
>
>
>
> Julian Ferry
> High Speed Engineering Manager
> Samtec, Inc
>
> -----Original Message-----
> From: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx] On 
> Behalf Of Brad Brim
> Sent: Friday, July 15, 2011 2:57 PM
> To: 'Jeff Walden'; si-list@xxxxxxxxxxxxx
> Subject: [SI-LIST] Re: Right Angle Bends
>
> exactly, Jeff ... and the traces that connect to the bends are also MUCH
> longer than typical for the RF/microwave case.
>
> In RF/mw ckt sim libraries/layouts a bend is a separate "component". The
> reference planes (i.e. where the traces connect to the bend) are at the edge
> of this component. For example, the 90-degree bend reference planes are at
> the edge of the square representing the area of the bend. For most SI
> applications the bend is NOT a separate component and the two traces simply
> meet at a single node. Having worked way too many hours to implement and
> test RF/mw ckt sim bend models over a dozen years ago I observed the
> parasitics are a delay of length on the order of the node-to-node distance
> with additional capacitive parasitics for sharp bends and inductive
> parasitics for aggressively chamfered bends. For a 90 degree bend the
> different definitions of reference plane imply 2*(W/2) additional length
> trace for the SI case. Given approximate parasitic delay of sqrt(2)*W/2, all
> implies doing nothing for SI applications is still on the order of only 30%
> phase delay error versus a much more precise parasitic model (for an already
> small parasitic). The phase delay dominates because bend capacitive
> parasitics are small for SI apps relative to other capacitive parasitics not
> modeled throughout the system.
>
> Therefore, if the trace are not wide (low impedance) and their lengths
> coming in/out of the bend are long relative to the linewidth, then ignoring
> the bend is obviously the correct choice.
>
> Where SI apps might not always want to ignore bends is for tight meander
> structures used to accumulate phase delay and balance skew. These geometries
> sometimes have short distance between bends and could therefore lose some
> accuracy from ignoring bend parasitics. In these cases it is probably more
> important to include coupling amongst the parallel traces. As we all might
> guess, if you need to know a meander behavior accurately you may wish to
> model it as a single component with more detailed simulation rather than
> treat it as a collection of traces (with or without bend parasitics).
>
> cheers,
>   -Brad
>
>> -----Original Message-----
>> From: si-list-bounce@xxxxxxxxxxxxx
>> [mailto:si-list-bounce@xxxxxxxxxxxxx] On Behalf Of Jeff Walden
>> Sent: Friday, July 15, 2011 10:55 AM
>> To: si-list@xxxxxxxxxxxxx
>> Subject: [SI-LIST] Re: Right Angle Bends
>>
>> The difference is that today's SI traces are significantly
>> narrower than the typical "RF" microstrip of 30 years ago.
>> -Jeff
>>
>>
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