[SI-LIST] Reply: Antwort: Re: Decoupling capacitors for BGA

  • From: "吴炎惊" <wyjmnls@xxxxxxx>
  • To: "andreas lenkisch" <andreas_lenkisch@xxxxxxxxxx>,dagmara.avanindra@xxxxxxxxx
  • Date: Mon, 15 May 2006 23:33:24 +0800 (CST)

 
 
Hi all,
 
   Decoupling  for BGA is a important topic, especially for the core power net 
in which there 
 
are so many capacitors. Because the location of decoupling capacitors are 
required as 
 
possible as close to the device in the IC's datasheet , what's more, there are 
very little 
 
areas for placement.
 
   There are tow way for this question, one hand is using smaller package, such 
as 0402,0201; 
 
the other hand is place cap around IC; As my experence,the first method is more 
easier, 
 
usually, take sure that one cap per tow or three pins.but for the second 
method, it is 
 
difficult for the larger loop inductance. but I think it is very imposible, its 
essence is 
 
how large the cap's parasitic inductance is. As long as the loop inductance is 
enough small,
 
the method is feasible.How to calculate the loop inductance? 
 
    exept for simulation soft, can we get a simple formula to evaluate it?
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