On 8 Apr 2009 at 15:02, olaney@xxxxxxxx wrote: > Perhaps the supplier knows the chip better than anyone else, but when > it comes to putting it on PCB and making it play well with others... > let's just say that silicon designers often aren't SI or EMC experts > by a long shot. And even if they are experts. You have a design with two or three chips which all claim (with really good reason) to need urgently the star point under their belly and nowhere else, otherwise it would fail catastrophically.... What to do with this constrainst? Regards Matthias Mansfeld (Been there, done that. We decided to make a nice solid plane, smashing all grounds together without any moats... Works perfectly. No A/B prototypes for comparison, sorry.) -- Matthias Mansfeld Elektronik * Leiterplattenlayout Neithardtstr. 3, 85540 Haar; Tel.: 089/4620 093-7, Fax: -8 Internet: http://www.mansfeld-elektronik.de GPG http://www.mansfeld-elektronik.de/gnupgkey/mansfeld.asc ------------------------------------------------------------------ To unsubscribe from si-list: si-list-request@xxxxxxxxxxxxx with 'unsubscribe' in the Subject field or to administer your membership from a web page, go to: //www.freelists.org/webpage/si-list For help: si-list-request@xxxxxxxxxxxxx with 'help' in the Subject field List technical documents are available at: http://www.si-list.net List archives are viewable at: //www.freelists.org/archives/si-list or at our remote archives: http://groups.yahoo.com/group/si-list/messages Old (prior to June 6, 2001) list archives are viewable at: http://www.qsl.net/wb6tpu