[SI-LIST] Re: Regarding DDR terminations
- From: Alfred Lee <alfred1520list@xxxxxxxxx>
- To: si-list@xxxxxxxxxxxxx
- Date: Fri, 17 Dec 2010 08:08:27 -0800
"Karthik P" <karthik_package@xxxxxxxxx> wrote:
>�3. I did length matching for all byte's in a bank within 100mils. Is
>there any way to find out in simulation that what length matching i
>achieved is right?
Ultimately you want the timing relationship between traces in the same byte
lane to be preserved. So launch an edge on all lines in the byte lane, and look
at the waveforms at the end. You want to see the spread of the edges to be
less than some numbers, says 10 ps. This also highlights that time matching
rather than length matching is what you want if the traces are routed on both
the outside and inner layers.
Regards,
Alfred Lee
--
Sent from my Android phone with K-9 Mail. Please excuse my brevity.
------------------------------------------------------------------
To unsubscribe from si-list:
si-list-request@xxxxxxxxxxxxx with 'unsubscribe' in the Subject field
or to administer your membership from a web page, go to:
//www.freelists.org/webpage/si-list
For help:
si-list-request@xxxxxxxxxxxxx with 'help' in the Subject field
List technical documents are available at:
http://www.si-list.net
List archives are viewable at:
//www.freelists.org/archives/si-list
Old (prior to June 6, 2001) list archives are viewable at:
http://www.qsl.net/wb6tpu
Other related posts:
