On Tuesday 13 October 2009, Embedded wrote: > Dear Experts, > In my 8-Layer design, as per stackup for 50 ohm SE impedance trace width > mentioned requirement is 12 mils for microstrip lines. It is not possible > to maintain 12 mils trace width considering my board size and component > placement density. I can use only less than 6 mils trace width for > microstrip. So we decided to route non-critical signals in Microstrip > routing. > > We have identified the follwoing group of signals are not critical since > their operating frequency is less. > > UART - Max baud rate 3 Mbps > SSP - Max bit rate 26Mbps > Key Pad - in KHz. > SDIO - 25 Mhz. > > AS per our understanding to condider a signal trace is transmission line > (high speed signal),the critical length is important.To calculate critical > length the rise time and fall time of the signal is taken. Thumb rule says > "Regardless of the clock or data frequency the design uses, the Effective > Operating Frequency of a circuit, or trace is: Signal Frequency [GHz] = > [0.35] / [Signal Transition Time {nSec}" > > But the rise time and fall time for specific interface is not mentioned in > my CPU datasheet. In datasheet commonly mentioned as Fast and Slow slew > rate IOs. The above mentioned group of signals are coming under slow slew > rate IOs. The slow slew rate mentioned as 1.6V/1nS. So rise time tr = > 2.06nS for LVCMOS 3.3V IO logic. So my effective frequency comes around > 170Mhz. Is my understanding correct? So do we need to match impedance > strictly for these signals? > > Looking forward your valuable inputs. > > Thanks in Advance. > MR Unless you have some unusually long trace lengths none of those types of signals have terribly stringent impedance requirements. With an 8 layer board, you could use 4 to 5 mil traces and have the PCB house adjust the lamination thicknesses to achieve approximately 50 ohms for both microstrip or stripline routed traces. Use some low value (22 to 33 ohm) series resistors close to the drivers on those that have fast edge rates. The UART signals and keypad can be ignored- any trace widths will work there. Note that SDIO has specific requirements regarding pull up and pull down resistors. Those signals plus SSP can benefit from series resistors. Keeping all the fast signals next to a ground or power plane helps as well. -Jeff -- F.O.M. Systems, Inc. http://www.fomsystems.com phone: (USA) +1-330-230-7520 or 800-936-0561 mobile: (USA) +1-330-802-1364, (World) +44-7793-827386, Skype: Adekguru =+=+=+=+=+=+=+=+=+=+=+=+=+= And He saith unto them, "Follow me, and I will make you fishers of men." (Matthew 4:19) ------------------------------------------------------------------ To unsubscribe from si-list: si-list-request@xxxxxxxxxxxxx with 'unsubscribe' in the Subject field or to administer your membership from a web page, go to: //www.freelists.org/webpage/si-list For help: si-list-request@xxxxxxxxxxxxx with 'help' in the Subject field List technical documents are available at: http://www.si-list.net List archives are viewable at: //www.freelists.org/archives/si-list or at our remote archives: http://groups.yahoo.com/group/si-list/messages Old (prior to June 6, 2001) list archives are viewable at: http://www.qsl.net/wb6tpu