[SI-LIST] Re: 答复: Re: ??: Re: Why is my PCB loss so high?

  • From: steve weir <weirsi@xxxxxxxxxx>
  • To: si-list@xxxxxxxxxxxxx
  • Date: Thu, 09 Apr 2015 21:40:54 -0700

Getting the measurements and models right is very important if you are
going to vary anything, which is pretty hard to avoid. In this, Wild
River and Simberian as well as others have done excellent work towards
obtaining pristine de-embedded measurements and accurately derived
parameter coefficients. They got there by doing a lot of time consuming
good work and constant error checking and refinement. Being paranoid, I
tend to trust very little: especially myself. Because of the very
careful and rigorous processes used, I trust Wild River's measurements
and the coefficient extractions performed using Simbeor. If you are
getting different results from the same or similar materials you owe it
to yourself to carefully double check your extraction methodology and
practices. Don't make yourself a victim of Finnegan's Finagling Factor.

Steve.
On 4/9/2015 7:51 PM, pcb_layup wrote:

Hi Yuriy,

We used the same stackup and cross-section to compare different
base-material's performance.
Yes, different cross-section will get different data. But the measured data
(measured lots of data from mass-produced boards ) tell me that the normally
4mil trace with 85 ohm and RTF copper designed cross-section which is hard
to reach 0.35db/inch@4G for FR408HR,even for I-SPEED. So I just want to
suggest don't over-optimistic on loss budget design.

Best regards,
Terry Ho

-----邮件原件-----
发件人: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx]
代表 Yuriy Shlepnev
发送时间: 2015年4月10日 5:34
收件人: pcb_layup@xxxxxxx; al@xxxxxxxxxxxxxxxxx; 'si-list'
抄送: 'Tom Dagostino'; 'Joel Brown'; 'Scott McMorrow'
主题: [SI-LIST] Re: ??: Re: Why is my PCB loss so high?

Terry,

It looks like you are lumping dielectric and conductor losses into the
dielectric loss by increasing the dissipation factor. It may be suitable
only in case if you use exactly the same cross-section as used on the test
board. Change of cross-section may cause substantial difference in the loss
estimation if losses from conductor roughness were not properly separated in
the model. See more on that at app notes #2012_02 and #2013_01 (paper from
DesignCon 2012) at http://www.simberian.com/AppNotes.php

Considering FR408, in another "Lessons learned..." project with smaller
traces in FR408HR we have observed total losses from 0.3 to 0.35 dB/inch -
see details in DesignCon 2013 paper available as #2014_01 at
http://www.simberian.com/AppNotes.php We used accurate analysis with
GMS-parameters that eliminates the reflection completely.

Best regards,
Yuriy

Yuriy Shlepnev, Ph.D.
President, Simberian Inc.
3030 S Torrey Pines Dr. Las Vegas, NV 89146, USA Office +1-702-876-2882; Fax
+1-702-482-7903 Cell +1-206-409-2368; Virtual +1-408-627-7706
Skype: shlepnev

www.simberian.com
Simbeor – Accurate, Fast, Easy and Affordable Electromagnetic Signal
Integrity Software
2010 and 2011 DesignVision Award Winner


-----Original Message-----
From: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx] On
Behalf Of pcb_layup
Sent: Wednesday, April 8, 2015 6:39 PM
To: shlepnev@xxxxxxxxxxxxx; al@xxxxxxxxxxxxxxxxx; 'si-list'
Cc: 'Tom Dagostino'; 'Joel Brown'; 'Scott McMorrow'
Subject: [SI-LIST] ??: Re: Why is my PCB loss so high?

Hi Joel,

I would like share some data simulated IS408HR for reference.
IS408HR: Stripline, VLP copper foil, DF=0.0101@1G; Simulation:
-0.448db/inch@3G.
IS408HR: Microstrip with SM coated, HTE copper foil, DF=0.0101@1G;
Simulation::-0.404db/inch@3G.

Personally I think IS408HR cannot reach -0.25~-0.3db/inch level. Because
comparing the ISOLA more high-end I-Speed DF=0.0068@1G, I got the measured
data about: -0.45db/inch@4G (Strip:VLP and microstrip HTE).
The data came from mass-produced TV boards follow Intel's 16L Insertion Loss
test board design, also did measurement correlation with third-party.

Best regards,
Terry Ho

-----邮件原件-----
发件人: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx]
代表 Yuriy Shlepnev
发送时间: 2015年4月9日 1:01
收件人: al@xxxxxxxxxxxxxxxxx; 'si-list'
抄送: 'Tom Dagostino'; 'Joel Brown'; 'Scott McMorrow'
主题: [SI-LIST] Re: Why is my PCB loss so high?

Joel,

To be more specific, here are the data we have observed on Wild River's
CMP-28 channel modeling platform made of FR408HR (see description at the
"Sink or Swim at 28 Gbps" app note available at
http://www.simberian.com/AppNotes.php, or complete description of Simbeor
Kit for CMP-28 platform at
http://www.simberian.com/Presentations/CMP-28_Simbeor_Kit_Guide.pdf):

Models identified with GMS-parameters (very similar to SPP):
FR408HR model: Wideband Debye, Dk=3.815 (3.66 in spreadsheet), LT=0.0117 @ 1
GHz; Conductor roughness model for strip: Modified Hammerstad, SR=0.4 um,
RF=2; Conductor roughness model for micro-strip: Modified Hammerstad, SR=0.4
um, RF=3.5; SR is RMS value of surface roughness and RF is the roughness
factor.
As you can see the identified FR408HR parameters are close to identified and
published by Isola. Small increase in the Dk is due to the anisotropy -
Isola uses Berezkin's method that identifies out of plane value of Dk with
wide strip resonator. For narrow strips we observe larger Dk because of in
plane values are typically larger due to layered structure of the laminate.

As you can see, attenuation for both strip and micro-strip is about 0.25
dB/inch at 3 GHz; It is a little larger for the common mode in microstrip -
about 0.268 dB/inch. Those are numbers identified with GMS-parameters by
removing reflection completely.

Let's see what can possibly increase the insertion loss from 0.3 to 0.76 or
even 1.4 dB/inch, as you observed it.
1. Reflection: Let's assume you have 5 inch t-line segment and 0.3*5
insertion loss expected without the reflections. If you observed 0.7*5 dB
insertion loss, the reflection loss should be about 5.8 dB at 3 GHz - pretty
bad connector or launch. It is even less possible to have 1.4*5 - the
reflection loss should be 2.9 dB (half of the energy reflected). You
definitely should notice that.

2. Roughness: The skin depth at 3 GHz in copper is about 1.2 um. To have
losses losses doubled the strips and planes must have RMS roughness value
close or larger than skin depth and roughness factor larger than 2
(mushroom-like surface). This is possible.

3. Plating for microstrips: Nickel-gold plating can substantially increase
the losses at 3 GHz (nickel produces resonance around 2.5 GHz). In this
paper
https://www.researchgate.net/publication/238524042_Nickel_characterization_f
or_interconnect_analysis we observed increase in the attenuation from 1
dB/inch to 1.64 dB/inch, though for different dielectric and packaging
interconnect. It would be very interesting, if it is nickel in your case.

4. Combination of different factors. The best way to go is to eliminate one
contributor at a time.

Best regards,
Yuriy

Yuriy Shlepnev, Ph.D.
President, Simberian Inc.
3030 S Torrey Pines Dr. Las Vegas, NV 89146, USA Office +1-702-876-2882; Fax
+1-702-482-7903 Cell +1-206-409-2368; Virtual +1-408-627-7706
Skype: shlepnev

www.simberian.com
Simbeor - Accurate, Fast, Easy and Affordable Electromagnetic Signal
Integrity Software
2010 and 2011 DesignVision Award Winner

-----Original Message-----
From: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx] On
Behalf Of Alfred P. Neves
Sent: Wednesday, April 8, 2015 8:30 AM
To: si-list
Cc: Tom Dagostino; Joel Brown; Scott McMorrow
Subject: [SI-LIST] Re: Why is my PCB loss so high?


Our Channel Modeling platform used for SERDES testing, ISI-32 is constructed
with FR408HR and the loss dB/inch/GHz as calculated by Simbeor, and ADS is
close to the Isola published loss numbers for loss tangent. This platform
includes multiple microstrip and stripline lengths from approximately
3inches to 50inches for creating ISI in several inch increments. We have
found the Isola published data to provide reasonably good accuracy for their
materials. TomБ-?s point is important in that return loss vectorially
subtracts from insertion loss, so a good launch design is important, even if
your using fancy de-embedding or loss extraction schemes.

For ADS we used measure-modeled based de-embedding, for Simbeor we used GMS
parameters. Simbeor uses line segments, in ADS we used lines and Beatty
standards. The ADS approach is described on Keysight/WRT Tutorial we did
last DesignCon and is on our website, 32Gbpsec Test Fixture Design, and
Simbeor has numerous app notes on GMS method.

Our measurements were validated using a good S-parameter work flow, checking
for passivity, causality, with a validated calibration using Stepped
impedance standard and precision wideband terminators, along with short
THRU. We pass our S-parameters through Simbeor for our post measurement
work flow.



- Al









Products for the Signal Integrity Practitioner



Alfred P. Neves
Chief Technologist



Office: 503-679-2429

www.wildrivertech.com










On Apr 7, 2015, at 5:44 PM, Scott McMorrow <scott@xxxxxxxxxxxxx> wrote:

to follow on, stripline or microstrip? are you deembedding the traces
to remove fixturing from the loss measurement.







Scott McMorrow
Consultant - R&D
16 Stormy Brook Rd
Falmouth, ME 04105
(401) 284-1827 Business
http://www.teraspeed.com

On Tue, Apr 7, 2015 at 5:13 PM, Tom Dagostino <tom@xxxxxxxxxxxxxxxxx>
wrote:
Joel

What is your test method? How are you connecting to the board? What
test equipment are you using? Are you measuring the same net on both
boards?
Tom Dagostino

Teraspeed Labs
9999 SW Wilshire Street
Suite 102
Portland, OR 97225

tom@xxxxxxxxxxxxxxxxx
www.teraspeedlabs.com

971-279-5325 office
503-430-1065 cell


-----Original Message-----
From: si-list-bounce@xxxxxxxxxxxxx
[mailto:si-list-bounce@xxxxxxxxxxxxx]
On
Behalf Of Joel Brown
Sent: Tuesday, April 07, 2015 2:01 PM
To: SI-List
Subject: [SI-LIST] Why is my PCB loss so high?

We have had several boards made from Isola FR408HR.
My understanding is that at 3 GHz loss should be about 0.3 db / inch.
On one board I am measuring about 0.76 db / inch, on another 1.4 db /
inch.
What can account for this?
Thanks


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