[SI-LIST] Re: Random Jitter Value varies with Data pattern

  • From: steve weir <weirsi@xxxxxxxxxx>
  • To: si-list@xxxxxxxxxxxxx
  • Date: Mon, 28 Jan 2013 00:45:32 -0800

Truly random jitter is independent of the data pattern.  Do you see this 
jitter going straight from a pattern generator into a signal analyzer, 
or only when your DUT is in the path?

Steve

On 1/27/2013 10:57 PM, vinod ah wrote:
> Hi All,
> On a 5Gb/s USB3 serial link, i see that there is variation in Random jitter
> value when i use CP0 pattern (PRBS 11 pattern) when compared to CP1 pattern
> (Clock pattern 2.5GHz).
>
> I also see a variation in deterministic jitter, but that is more
> understandable as ISI effects are dominant with PRBS pattern and it is
> pretty much constant with clock pattern.
>
> Is Random jitter varying with data pattern is expected?. The difference in
> readings is 2ps (Rj with PRBS is 5ps mean, while Rj with clock pattern is
> 3ps mean)
>
> Note: The measurements are not dual-dirac model based measurements.
>
> Regards
> Vinod A H
>
>
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