[SI-LIST] Re: ROOKIE: Anti-Pad Size Effect On Signal Integrity:By the formula, as F goes up, Xc goes down (was up by typo)

  • From: "Salkow, Steven" <steven.salkow@xxxxxxxx>
  • To: "Hill, John" <John.Hill@xxxxxxxxxx>, chand_374@xxxxxxxxx, PaulClarke@xxxxxxxxxxxxx, si-list@xxxxxxxxxxxxx
  • Date: Tue, 12 Dec 2006 14:12:40 -0800

A direct link to a partial of Howard Johnson has a video about Via
Inductance:
http://www.sigcon.com/SiLab/Via_clip.wmv

ss

-----Original Message-----
From: Hill, John [mailto:John.Hill@xxxxxxxxxx] 
Sent: Tuesday, December 12, 2006 6:51 AM
To: chand_374@xxxxxxxxx; Salkow, Steven; PaulClarke@xxxxxxxxxxxxx;
si-list@xxxxxxxxxxxxx
Subject: RE: [SI-LIST] Re: ROOKIE: Anti-Pad Size Effect On Signal
Integrity:By the formula, as F goes up, Xc goes down (was up by typo)

Chand,

Howard Johnson has a video about Via Inductance where he tunes a via.
There is nothing like going in the lab and seeing it for yourself.
Howard has captured that in his video.

Here is a link to his web site:
http://www.sigcon.com/SiLab/filmsNow.htm

Best regards,

John

John Hill
Design Engineer
TK  HOLDINGS INC   
Electronics 
27200 Haggerty Road  Suite B-12  
Farmington Hills, MI 48331
Office Phone: 248 699 2915
Mobile Phone 248 765 3599


 

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-----Original Message-----

From: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx]
On Behalf Of chand basha
Sent: Tuesday, December 12, 2006 3:03 AM
To: steven.salkow@xxxxxxxx; PaulClarke@xxxxxxxxxxxxx;
si-list@xxxxxxxxxxxxx
Subject: [SI-LIST] Re: ROOKIE: Anti-Pad Size Effect On Signal
Integrity:By the formula, as F goes up, Xc goes down (was up by typo)

 
  Steven Salkow,
   
  its an excellent presentation, very simple really very simple,
   
   I have a dought in the last para i.e
  How do we tune via impedance? We use ground vias nearby and 3D
Modeling
tools that exist to fufill this purpose but that is beyond the scope of
a short answer.
   
  if you can explain a littile bit about tuning the impedance with
ground vias will be very much 
  help full.
   
   
  Thanks in advance.
   
  chand
   
  
"Salkow, Steven" <steven.salkow@xxxxxxxx> wrote:
  

-----Original Message-----
From: Salkow, Steven 
Sent: Monday, December 11, 2006 1:59 PM
To: 'PaulClarke@xxxxxxxxxxxxx'; 'si-list@xxxxxxxxxxxxx'
Subject: RE: [SI-LIST] ROOKIE: Anti-Pad Size Effect On Signal Integrity

Paul:
I will make this simple are seems reasonable. It does, however, seem to
me quite extraordinary that a mechanical fellow might be getting
involved with Gigahertz design of vias.

You're correct the effect does depend on speed. The "anti-pad" is used
when building plane layers (i.e.: solid layers) using negative planes.
It is the VOID area between the pad and the copper of the plane. The
effect is to provide a capacitive reactive effect given by the formula
Xc= 1/(2*pi*F*C) where f is frequency and C is capacitance. By the
formula, as F goes up, Xc goes down (was up by typo). The C capacitance
is given by the formula C = (Area*k*e)/length where length is really the
distance the two areas are apart (in this case the width of the anti-pad
(the bigger the gap, the smaller the capacitance). The effects of C is
cumulative for multiple planes.

If the anti-pad size is very large, are we out of the woods. NO!
All signals used in modern design as transmission lines have a certain
desirable impedance. The is the effective "resistance" of the line that
best matches the driver electronics. When effective "resistance" of the
line does not match the driver electronics one of two possibilities
happen:
The signal has energy reflected back to the source
Or excessive energy is absorbed by the circuit a too little gets to the
load. 
Anti-pads are designed to maintain the required effective "resistance"
(impedance) of a transmission line at a matching value. What's that
mean?
If the line impedance and the driver impedance and the load impedance
are all 50 ohms, then the via should be tuned to the same value.

How do we tune via impedance? We use ground vias nearby and 3D Modeling
tools that exist to fufill this purpose but that is beyond the scope of
a short answer.

Steven Salkow
Lockheed IS&S
3130 Zanker Rd, San Jose
Ca. 94588
steven.salkow@xxxxxxxx
salkow@xxxxxxxxxxxx



-----Original Message-----
From: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx]
On Behalf Of Clarke, Paul
Sent: Monday, December 11, 2006 1:25 PM
To: 'si-list@xxxxxxxxxxxxx'
Subject: [SI-LIST] ROOKIE: Anti-Pad Size Effect On Signal Integrity

Hello,

Before you read the question please keep in mind that I am just a lowly
Mechanical guy that has better odds of selecting the right bolt than I
do
designing an LED circuit. 

I have a question about how the size of an anti-pad can effect signal
integrity. The example application could be a backplane @ 5, 10, 20, 40,
or
80 [G] (I am asking for this range because I anticipate the answer may
depend on the speed).

If you have a BP via for a signal pair of .025" with a pad of .044", how
much impact can an antipad have on the impendance through a range of
sizes
of let's say .054-.060"? Center-Center distance could be 2.1 [mm].

In the case described above, would the antipad size range really have
any
effects or is it negligible? 
Is an anti-pad just to keep solder off the pad if you flood the plane?
Or is
there an actual SI reason for those things? 
How sensitive is the SI to changes in antipad size?
Any concerns regarding manufacturing tolerances on antipads?

Thank you for any information and your patience explaining any of the
above
questions to a mechanical guy.

Paul Clarke 


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