[SI-LIST] Re: R: Too much predicted loss
- From: "Mike Greim" <mike.greim@xxxxxxxxxxx>
- To: <yang.you@xxxxxx>, "Istvan novak" <istvan.novak@xxxxxxx>, <Giovanni.Guasti@xxxxxxxxxx>
- Date: Wed, 13 Jul 2005 08:46:24 -0500
Hi,
Not that this is your problem, but one
of the things that I have seen in the=20
past with something like this is if part
of your geometry ends up with the wrong units.
I am reminded of a dual stripline stackup
that was having not dis-similar problems.
End result was that part of the stackup was
defined as meters instead of mils.
Just a thought.
-----Original Message-----
From: si-list-bounce@xxxxxxxxxxxxx
[mailto:si-list-bounce@xxxxxxxxxxxxx]On Behalf Of You, Yang
Sent: Wednesday, July 13, 2005 8:40 AM
To: Istvan novak; Giovanni.Guasti@xxxxxxxxxx
Cc: si-list@xxxxxxxxxxxxx; Ing. Giancarlo Guida
Subject: [SI-LIST] Re: R: Too much predicted loss
Istvan, Guasti,
Thanks for your reply. This is for a 6 inch, 10 mil trace on the
top layer of a board. The difference between the simulation and
laboratory data is clear from 0 MHz but it deviates more and more after
2 GHz. Using connector models only worsens the results. I've tried
doubling the thickness of the copper as well as adjusting the dielectric
constant and loss tangent values without improvement. Any other ideas?
Yang You
-----Original Message-----
From: Istvan novak [mailto:istvan.novak@xxxxxxx]=3D20
Sent: Wednesday, July 13, 2005 7:52 AM
To: Giovanni.Guasti@xxxxxxxxxx
Cc: You, Yang; si-list@xxxxxxxxxxxxx; Ing. Giancarlo Guida
Subject: Re: [SI-LIST] R: Too much predicted loss
Well, 8dB sounds like a lot, but the first questions in my mind:
- at what frequency?
- for what length?
- with what kind of connections at the ends?
Regards,
Istvan Novak
SUN MIcrosystems
Guasti Giovanni wrote:
>I don't think a little change in dielectric thickness could change =
=3D3D
>losses of 8dB.
>What about the real thickness of copper? depending on pcb manufacturer,
=3D3D
>layers where via and buried holes start and end increase their
thickness =3D3D
>(for example top and bottom) for exampre from 18um to 30-40um. So
losses =3D3D
>can reduce if your traces are on that kind of layers.
>Hope this help
> Giovanni
>
>
>
>-----Messaggio originale-----
>Da: You, Yang [mailto:yang.you@xxxxxx]
>Inviato: marted=3D3DEC 12 luglio 2005 18.10
>A: si-list@xxxxxxxxxxxxx
>Oggetto: [SI-LIST] Too much predicted loss
>
>
>Hi,
> I'm working with the SIWave software on a board with some
>test traces but the results of the simulation indicate about 8 db more
>loss than is actually seen in the lab on the actual board. I imported
>the board directly from the layout tool and setup the stackup but I
>think the dielectric layers I specified might be a little thinner than
>on the actual board. Would that cause more loss to show up in the
>s-parameters? What other factors might be contributing to this? Thanks
>for your help.
>
>=3D3D20
>
>Yang You
>
>=3D3D20
>
>Texas Instruments, Inc.
>
> =3D20
>
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