[SI-LIST] R: Re: clock divider
- From: Guasti Giovanni <Giovanni.Guasti@xxxxxxxxxx>
- To: "'atokuz@xxxxxxxxx'" <atokuz@xxxxxxxxx>, si-list@xxxxxxxxxxxxx
- Date: Thu, 27 Nov 2003 16:00:59 +0100
what about a clock driver that is able to produce /2 or *2 from the =
original
clock?
I'm thinking to IDT2308-2
By!
Giovanni
-----Messaggio originale-----
Da: Ahmet Tokuz [mailto:atokuz@xxxxxxxxx]
Inviato: gioved=EC 27 novembre 2003 9.13
A: atokuz@xxxxxxxxx; si-list@xxxxxxxxxxxxx
Oggetto: [SI-LIST] Re: clock divider
Hello,
I want to explain my problem in graphics. Hopefully it
would be better to understand.=20
By the way, Dave thanks a lot for your proposal.=20
/--------\ /---------\
| | | |
| | | |
--------| |--------| |--------- =20
(a)
|------------------|
| |
------------------| |---------
(b)
|------------------|
| |
---------| |-----------------
I am looking for a solution which guarantees that (b)
is always the case.
thanks
-ahmet
--- Ahmet Tokuz <atokuz@xxxxxxxxx> wrote:
> Hello,
>=20
> I was wondering whether there's a way of dividing
> clock by 2 deterministicly. I mean there may be two
> outputs. However I am interested in the one with
> where phase is synched. I mean both rising and
> falling
> edges are aligned. Are there any way to ensure that?
>=20
> thanks
>=20
>=20
>=20
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