[SI-LIST] Re: Questions on PLL response
- From: Chris Cheng <Chris.Cheng@xxxxxxxxxxxx>
- To: "'Michael_Poimboeuf@xxxxxxxxxxxxxx'" <Michael_Poimboeuf@xxxxxxxxxxxxxx>,si-list@xxxxxxxxxxxxx
- Date: Thu, 5 Feb 2004 18:25:11 -0800
Strange. You can observe directly the damping factor by monitoring the cold
or hot start behavior of VCO control voltage either in simulation or
measurement. In all the cases they are directly related to the loop filter I
pick. I don't think I am confused.
-----Original Message-----
From: Michael Poimboeuf [mailto:Michael_Poimboeuf@xxxxxxxxxxxxxx]
Sent: Thursday, February 05, 2004 6:12 PM
To: si-list@xxxxxxxxxxxxx
Subject: [SI-LIST] Re: Questions on PLL response
Geoff references F.M. Gardner "Phaselock techniques," which does express
PLLs using classic control theory as do most references including Best
"Phase Locked Loops" and others. While it's important to understand the
classic second order treatment given in Gardner's and Best's works, I've
found the approach used by Wolaver "Phase-Locked Loop Circuit Design" to
be more practical when designing PLLs such as the type Chris describes,
i.e. ones that have good jitter attenuation characteristics. I think
this gets to the root of what you are wondering about Partha, i.e. why
not make the PLL overdamped?
Wolaver points out that for heavily overdamped systems where the 2nd
pole frequency is much less than the loop bandwith (or zeta is much less
than 0.5) the response of the PLL (peaking frequency and peaking
magnitude) "hardly depends" on the classic second order natural
frequency, but is the geometric mean of that 2nd pole and the loop
bandwidth.
See the text for more details and background, but in a nutshell, the
numbers I find effective in almost all cases are those given in
Wolaver's table 3-1 "Peaking Parameter Approximations" and specifically
the equation for peaking frequency in the overdamped case which is
equivalent to the total PLL bandwidth wp=3D1.2((w2)2^3/4)((K)^1/4).
Also, don't confuse "overdamped" with "low bandwidth." One can have an
underdamped PLL with low bandwidth or an overdamped PLL with wide
bandwidth, although generally I like to keep my damping (defined in
Wolaver as w2/K to less than 0.25).
See Wolaver if you have followup questions.
--
mkp@xxxxxxxxxxxxxx
-----Original Message-----
From: Chris Cheng [mailto:Chris.Cheng@xxxxxxxxxxxx]=20
Sent: Thursday, February 05, 2004 1:27 PM
To: si-list@xxxxxxxxxxxxx
Subject: [SI-LIST] Re: Questions on PLL response
There are a few more considerations :
a) If you believe you have a highly jittered input source, I would agree
that you are better off with a critically damped loop filter to give the
PLL the fastest response time to reject the jitter. I still won't go
underdamp since it usually results in larger jitter at the output.
b) If you believe you have a noisy power source (especially with low
frequency components), it is advantageous to overdamp the PLL so that
the jitter induced by the power noise can be rejected at a lower
frequency. You will need to have external power filters below that
frequency. That's usually consists of those funny ferrites and caps
combo in these PLL app notes you see in oh so many highspeed VDDA pins.
In all of my PLL designs, I always have more problem in b) so I always
overdamp the loop filter.
Classic PLL loop dynamics depends on the PFD/VCO gain and the 2nd order
filter. But I would caution many new designs does not falls into this
simple analysis.
-----Original Message-----
From: Geoff Stokes [mailto:gstokes@xxxxxxxxx]
Sent: Thursday, February 05, 2004 3:41 AM
To: si-list@xxxxxxxxxxxxx
Subject: [SI-LIST] Re: Questions on PLL response
Dear Partha
Answering question 2 first, the PLL bandwidth depends on the loop gain
parameters and their base band frequency responses. It's all described
in F.M. Gardner "Phaselock techniques".
The optimal practicable damping factor will give the fastest response
time with minimal overshoot and ideally no ringing, so that the settling
time window is minimised for which you can expect phase disturbance and
any associated timing uncertainty. For a second order loop, a damping
factor zeta=3D1 gives the fastest settling time with no overshoot.
Zeta=3D0.707 gives the fastest settling time with a single overshoot, =
and
slightly faster than for zeta=3D1. In addition, the 0.707 value gives a
second order Butterworth type filter response to any input phase
disturbances. If the response is underdamped, that settling time window
is lengthened. If the response is overdamped, the settling time is also
lengthened, but also the stop-band phase-filter rejection is reduced.
In practice, because of VCO characteristic non-linearity and other
uncertainties, the damping factor cannot be controlled precisely. If
you can get the value between about 0.5 and 2 you're doing quite well.
I would aim for a value of around 1 because you have less margin for
error on the low side.
Cheers
Geoff
> -----Original Message-----
> From: Parthasarathy Sampath [mailto:parthsv@xxxxxxxxx]
> Sent: 05 February 2004 10:17
> To: si-list@xxxxxxxxxxxxx
> Subject: [SI-LIST] Questions on PLL response
>=20
>=20
> Hi All,
> 1. The PLL response time depends on 'damping
> factor'. The common value of it used is '0.707', which
> makes the system underdamped since for damping factor
> < 1, the system is underdamped.=20
> My question is why not make the system overdamped
> since the response will be smooth and straight?
>=20
> 2. What are the parameters on which PLL bandwidth
> depend?
>=20
> Thanks in Advance,
>=20
> Regards,
> Partha!
>=20
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