[SI-LIST] Question on ground trace in TL

  • From: Bi Han <mike_bihan@xxxxxxxxxxxx>
  • To: han.bi@xxxxxxxxxx, si-list@xxxxxxxxxxxxx
  • Date: Mon, 1 Aug 2005 21:24:24 +0800 (CST)

Dear friends:

 

I did an experiment on TL simulation. The transmission line configuration is 
CPS.

There is no other ground on the chip.

 

++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++

 

                 +++++++++         +++++++++++++++++

DIEL          +  sig        +         +      GND                 +

                 +++++++++         +++++++++++++++++

 

+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++

 

SUB

 

+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++

 

Case A:  I set GND trace as reference conductor in 2D solver.

Case B:  I set GND trace as signal trace, and place another reference conductor 
far away.

 

Both cases are simulated in .AC analysis. 

In case A, it is a 1 conductor case and the R_term is placed between SIG and 
ideal ground (node 0 in hspice).

In case B, it is a 2 conductor case and the R_term is placed between two 
conductors and does not connect to ideal ground;

 

In short, in case B, ground trace is treated as a signal line; all other setups 
are the same.

The simulation setup case B is like below:

 

 

 

 

 

 

 

 

 


At far end, a resistor terminates between SIG and GND trace. At near end, same 
resistor terminates. In case A, both source and load well terminated and at far 
end, see very smooth voltage gain.

In case B, it is assumed matched. However, in frequency sweep, severe peaking 
is seen in far-end voltage.

 

The result is very confusing. Which case is real? Both cases have their 
drawback.

Case A assumed ground trace to be very quiet and ¡°0¡± everywhere.

Case B introduced another reference conductor faraway, which induce GND/SIG 
trace ¡°common mode¡± resonance.

 

I hope people could wash my mind. (It is quite stuck inside now.) This 
experiment also lead me to doubt that why PCB ground plane could be used as 
reference plane. In high speed signal case, most return current will flow just 
underneath the signal trace. The EM condition will be very like above 
experiment. The voltage distribution should not be ideally ¡°0¡± everywhere. 
Understanding above case is the key to me.

 

Thanks you!


                
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