[SI-LIST] Re: Question on Impedance Control
- From: "Zabinski, Patrick J." <zabinski.patrick@xxxxxxxx>
- To: si-list@xxxxxxxxxxxxx
- Date: Thu, 20 Mar 2003 13:10:42 -0600
Pat
I'll suggest a slightly different approach...
When wire bonds are used, I'm assuming you're dealing with
reasonable data rates (i.e., not 10's of GHz). If so,
the bond wire itself can be modeled as a lumped
inductance. A reasonable guess to start with is about
1 nH/mm of wire length (+/-20%).
On the die, there will be a bond pad, which will have
a capacitive reactance. The amount of capacitance will
vary quite a bit depending upon pad size, technology,
etc., but 50 to 200 fF is a reasonable place to start.
In the package, you have a bond pad as well, which
typically looks like a capacitor. Here, the range of
values is too great to give a reasonable guess, but
it is also a value you have some control over (through
package design).
One approach we've taken is to look at the lumped
values for the two bond pads and bond wire and tune
them to approximate 50 ohms. More specifically:
50 = sqrt(L/(C1+C2))
where:
L = bond wire inductance
C1 = die-side bond pad capacitance
C2 = package-side bond pad capacitance
For example, if you have a 1 mm long wire, the inductance
will roughly be 1 nH. Going through the simple math,
then C1 + C2 needs to be about 400 fF.
Assuming a nominal 100 fF die pad capacitance, then you can
"tune" the package pad capacitance to be about 300 fF.
Again, for low freqs, this approach seems to work well.
For high frequency applications, you'll generally need
some control over the die, package, and assembly. If you
have enough freedom, one method that we've used to
10's GHz is to use ribbon-bonds (i.e., flat and wide
ribbons of gold in place of round wires) in a ground-signal-ground
configuration. In doing so, we've been able to achieve
return loss to better than 15 dB up to 15 GHz (note:
a glob-top helps in increasing the capacitive coupling).
I believe we could do better than this, but it takes
a bit more tuning of the geometries. However, keep in
mind that most assembly houses are not prepared to deal
with ribbon bonds.
Hope this helps,
Pat
> I think enough has been discussed about using a 2D solver to
> determine the
> trace W/S and di-e thickness to achieve the desired impedance
> - single-ended
> or differencial.
>
> However, in a real package other than flipchip/CSP, bond
> wires are needed
> for the die to traces connection. As such, no matter how well it is
> controlled on the traces, the presence of bond wire will
> always throw the
> impedance off (usually higher).
>
> So here are the questions about how this is handled in practice:
>
> 1. Design the traces to the targeted 50 or 100 ohm and ignore
> the effect of
> wires, hoping for the best?
> 2. Pre-lower the trace impedance in design in anticipating
> the effect of
> wire?
> 3. Use 3D simulation on the designed wire + trace struction
> to calculate the
> actual impedance?
>
> Feedback appreciated.
>
> Pat
>
>
> Pat Diao
> ASAT
> Fremont, CA
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