I think enough has been discussed about using a 2D solver to determine the trace W/S and di-e thickness to achieve the desired impedance - single-ended or differencial. However, in a real package other than flipchip/CSP, bond wires are needed for the die to traces connection. As such, no matter how well it is controlled on the traces, the presence of bond wire will always throw the impedance off (usually higher). So here are the questions about how this is handled in practice: 1. Design the traces to the targeted 50 or 100 ohm and ignore the effect of wires, hoping for the best? 2. Pre-lower the trace impedance in design in anticipating the effect of wire? 3. Use 3D simulation on the designed wire + trace struction to calculate the actual impedance? Feedback appreciated. Pat Pat Diao ASAT Fremont, CA ------------------------------------------------------------------ To unsubscribe from si-list: si-list-request@xxxxxxxxxxxxx with 'unsubscribe' in the Subject field or to administer your membership from a web page, go to: //www.freelists.org/webpage/si-list For help: si-list-request@xxxxxxxxxxxxx with 'help' in the Subject field List archives are viewable at: //www.freelists.org/archives/si-list or at our remote archives: http://groups.yahoo.com/group/si-list/messages Old (prior to June 6, 2001) list archives are viewable at: http://www.qsl.net/wb6tpu