[SI-LIST] Re: Query on power noise sensitivity measurement problem
- From: Huang chunxing <huangchunxing@xxxxxxxxxx>
- To: DAVID CUTHBERT <telegrapher9@xxxxxxxxx>, robert_sleigh@xxxxxxxxxxx, steve weir <weirsi@xxxxxxxxxx>
- Date: Wed, 30 Apr 2008 15:24:07 +0800
Dave, Rob, Steve,
Thanks for your sharing and help.
Your suggestions and answers are helpful.
Have a nice day!
Huang Chunxing
HUAWEI TECHNOLOGIES CO.,LTD.
Address: Huawei Industrial Base
Bantian Longgang
Shenzhen 518129, P.R.China
Tel: +86 755 89651027
Fax: +86 755 89650600
E-mail: huangchunxing@xxxxxxxxxx
www.huawei.com
----- Original Message -----
From: DAVID CUTHBERT
To: robert_sleigh@xxxxxxxxxxx
Cc: huangchunxing@xxxxxxxxxx ; si-list@xxxxxxxxxxxxx
Sent: Monday, April 28, 2008 9:20 PM
Subject: [SI-LIST] Re: Query on power noise sensitivity measurement problem
When performing these measurements I manually adjust the power bus injected
signal for each frequency. If you'd like to perform a single sweep an
amplifier can be configured to maintain a constant amplitude into the power
bus.
Dave Cuthbert
On Sun, Apr 27, 2008 at 10:42 PM, <robert_sleigh@xxxxxxxxxxx> wrote:
> Greetings,
>
> Here's a link to a recent seminar which covers TX/RX PLL =
> characterization. http://www.techonline.com/learning/webinar/206801021=20
>
> This measurement technique would also allow measurement of the Jitter =
> Spectrum (RJ/PJ RJ/SJ) while injecting "power noise on PLL power".=20
>
> Best regards,
> Rob Sleigh
> Digital Test Division
> Agilent Technologies, Inc.
>
> -----Original Message-----
> From: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx] =
> On Behalf Of Huang chunxing
> Sent: Saturday, April 26, 2008 2:02 AM
> To: si-list@xxxxxxxxxxxxx
> Subject: [SI-LIST] Query on power noise sensitivity measurement problem
>
> Content-type: text/plain; charset=3Dgb2312
> Content-transfer-encoding: 7BIT
> Hi experts,
>
> I am trying to find out whether it is possible to get the relationship =
> between powernoise and output jitter by measurement.
> To be convenient, I would like to call it Power Noise sensivity. =20
>
> My initial thought is to inject a certain frequency power noise on PLL =
> power, and then measure SJ at the frequency on TX output signal.=20
> But it is some difficult to be applied in practice due to PDN impedance =
> variance.
> Is there any craft method to avoid it?
>
> As to RX side, it is difficult to loop out clock recovered by CDR.
> I was ever been told that as TX and RX share same PLL, or use same =
> design PLL, so power sensitivity at RX is similar with power sensitivity =
> at TX. If we measure power sensitivity at TX, then we can get one at RX.
> Is that true, or could stand at most cases?
>
> I tried to find some documents for reference, but I failed.
> I hope experts here who ever did similar work may give me some comments =
> and suggestions.
> Thanks in advance! =20
>
>
> Regards,
>
> Huang Chunxing
> HUAWEI TECHNOLOGIES CO.,LTD. =20
>
>
> Address: Huawei Industrial Base
> Bantian Longgang
> Shenzhen 518129, P.R.China
> Tel: +86 755 89651027
> Fax: +86 755 89650600
> E-mail: huangchunxing@xxxxxxxxxx
> www.huawei.com
>
>
>
> -- Binary/unsupported file stripped by Ecartis --
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> -- File: outlook_huawei_logo_en.jpg
>
>
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