[SI-LIST] Re: Pull up and pull down curves in PCI local bus specifications

  • From: "Andrew Ingraham" <a.ingraham@xxxxxxxx>
  • To: "si-list" <si-list@xxxxxxxxxxxxx>
  • Date: Tue, 21 Aug 2007 17:06:32 -0400

>      I'm looking at the VI curve of PCI spec rev 3.0 version. Under
>      AC specs, I want to know how did PCI get the exact
>      equations for Ioh and Iol for different Vout voltage range.Please
>      suggest any study material for derivation of these.

I answered your question in the PCI-SIG maillist already ... but for the
benefit of others in this group, here it is again.

I suspect the curves (quadratic equations) to which you refer, were intended
to be an approximation to the shape of the I/V curves of a typical output
buffer.  I don't think there is much more "science" to them than that.
Obviously they wanted to specify maximum I/V limits for those output
transistors, and I think whoever worked on creating this part of the PCI
spec wanted to have something better (more realistic) than just a straight
line or PWL approximation, so they came up with the formula and matched it
empirically to what they typically saw in actual CMOS output buffers.

That's my guess.

I've never seen any more detailed information on these.  At one time Intel
or the PCI SIG had a videotape about the thousands of hours of electrical
simulations they did while developing PCI.  As I recall, it wasn't very
strong on technical details, mostly intended to give you a "warm and fuzzy
feeling" about the amount of work they did analyzing the electrical
performance of the bus.  Back in those days they also used the nickname
"Speedway" when talking about a PCI bus, and some versions of HSpice
included one or two demo models that referred to "Speedway" and might have
been related to the very early work done by Intel when developing PCI.

Aside from the PCI specification itself, there are a few books published
about PCI and the spec, but I think these do not provide much if any
additional technical information about the electrical side of the spec.

>       Also
>      if these curves ( Vout Vs Idriver ) are met in DC condition, will
>      they really meet in transient also. ?

Chances are, yes; at least as far as meeting the spec is concerned.  The
spec gives no prescribed way to do transient measurements of the "AC" I/V
limits, so you do basically do them as semi-steady-state measurements.  In
SPICE this is straight-forward because SPICE doesn't know about heat
generated by prolonged power dissipation.  Actual measurements might need
to be time-limited to prevent over-heating and/or minimize the shift in I/V
with die temperature.

FYI, I believe you only need to verify the "test point," not the whole


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