[SI-LIST] Re: Propagation delay question
- From: Dan Bostan <dbostan@xxxxxxxxx>
- To: Stephen Zinck <signalintegrity@xxxxxxxxxxx>, 'Si-List' <si-list@xxxxxxxxxxxxx>
- Date: Mon, 31 Jan 2005 11:47:48 -0800 (PST)
Stephen,
I am using a typical DDR PTP topology, with a series
termination and a parallel termination to VTT, with
two IOs, one for an ASIC and one for the memory.
Since I am simulating AND measuring at the pin, I do
not see how the package parasitics play here.
And, yes, I am measuring at exaclty the same threshold
voltage.
The slew rate is different, since I have two different
IOs.
Thanks,
/dan
--- Stephen Zinck <signalintegrity@xxxxxxxxxxx> wrote:
> Hi Dan,
>
> Maybe you could give the list a little more detail
> as far as the topology,
> etc for the circuit in question.
>
> But off the cuff, my guess would be loading
> differences between
> bi-directional drivers. You may have two loads at
> the memory and one at the
> controller. Package models may be sufficiently
> different to cause some the
> delay differences you are seeing as well. Finally,
> you may have a single
> parallel term down one end (near the SDRAM) or two
> series terms with
> different values that could cause edge-rate
> differences, which would
> manifest itself as different delay characteristics
> depending on drive
> direction. By the way, how are you measuring delay
> (i.e. to the vdd/2
> threshold point, etc.?)?
>
> Regards,
> Steve
>
> Stephen P. Zinck
> Interconnect Engineering
> 25 Bennett Lot Road
> South Berwick, ME 03908
> Phone - (207) 384-8280
> Fax - (207) 384-5388
> Email - szinck@xxxxxxxxxxxxxxxxxxxxxxxxxxx
> Web - www.interconnectengineering.com
>
>
> ----- Original Message -----
> From: "Dan Bostan" <dbostan@xxxxxxxxx>
> To: "'Si-List'" <si-list@xxxxxxxxxxxxx>
> Sent: Monday, January 31, 2005 2:20 PM
> Subject: [SI-LIST] Propagation delay question
>
>
> > Fellow SI members,
> > Could anyone explain to me why the propagation
> delay,
> > simulated and measured at the pin, on a
> bidirectional
> > DQS line, for a DDR memory, is different for a
> write
> > cycle vs. a read cycle?
> > Obviously, the transmission line is identical,
> only
> > the drivers are different.
> > /dan
> >
> >
> >
> >
> >
> > __________________________________
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