[SI-LIST] Re: Propagation delay on embedded microstrip
- From: "giancarlo guida" <gguida@xxxxxxxxxx>
- To: <bipindhavale@xxxxxxxxx>, <si-list@xxxxxxxxxxxxx>
- Date: Wed, 29 Sep 2004 17:02:02 +0200
Hi Bipin,
I would not use stripline as a way to calculate the delay
I would be afraid to over estimate it.
( you actually ahve an embedded microstrip)
In your case what plays a role is the fact that you have a dielectric on the
top
of the S1.
The dielectric will change the field distribution or if you like the
effective dielectric
costant and so also the other trasmission line parametrs will be affected.
Top layer will not play a very significant role
unless you do not have a copper area on the top of your signal on S1
To make some simulation
you may want go on Ansoft web site
and download Maxwell SV that is free
It allow you to make 2D analysis that should be enough to reply to your
question
Hope this help
Giancarlo
----- Original Message -----
From: "Bipin Dhavale" <bipindhavale@xxxxxxxxx>
To: <si-list@xxxxxxxxxxxxx>
Sent: Wednesday, September 29, 2004 12:13 PM
Subject: [SI-LIST] Propagation delay on embedded microstrip
Hi Everyone,
In the stackup shown below what propagation delay should I consider
in Signal Layer S1 ?
---------------Top (Signal)
---------------S1(Signal)
---------------Plane(Pwr or gnd)
Thickness between Top to S1 is equal to S1 to Plane
What would be the best assumption ?
a] Microstrip
b] Close to microstrip
c] Stripline
d] Close to stripline
e] Inbetween stripline & microstrip
Also If i consider S1 layer as deeply embedded (S1 to Plane >>> Top
to S1) Can I
safely consider propagation delays in layer S1 as close to stripline ?
Thank you,
Bipin
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