[SI-LIST] Re: Problems of using DDR SDRAM with out VTT termination?
- From: "Ferhat Yaldiz" <ferhat.yaldiz@xxxxxxxxxxxxxx>
- To: "'Jaison Fernandez'" <jaisonf@xxxxxxxxxxxxxxx>, <si-list@xxxxxxxxxxxxx>
- Date: Thu, 2 Apr 2009 12:19:29 +0300
Hi Jasion,
You can use DDR1 (SSTL2.5) without VTT. According to your SI and timing
simulations, you must decide your topology with VTT or without VTT. In my
old design (DDR1 Controller + 9 DDR1 SDRAM), Although DDR1 controller
suggest to use with VTT in data and address lines as JEDEC, I do not use VTT
topology any lines. You can foresee possible problems from board after
simulations.
Best Regards,
FERHAT YALDIZ
HARDWARE DESIGN ENG.
TUBITAK
-----Original Message-----
From: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx] On
Behalf Of Jaison Fernandez
Sent: Thursday, April 02, 2009 8:25 AM
To: si-list@xxxxxxxxxxxxx
Subject: [SI-LIST] Problems of using DDR SDRAM with out VTT termination?
Dear All,
Going through some of the NEC and NXP SoC's reference schematics shows that
the VTT supply for DDR is not used.
Can we use DDR SDRAM with out VTT termination?
If we use DDR with out VTT termination what can be the possible problems
expected from the Board? (In terms of SI and EMC)?
What are the system design considerations taken to mitigate above problems?
With Warm Regards,
JAISON FERNANDEZ
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