[SI-LIST] Presentation on new pcb reference designs and models

  • From: Julian Ferry <julian.ferry@xxxxxxxxxx>
  • To: si-list@xxxxxxxxxxxxx
  • Date: Mon, 28 Jul 2003 11:45:56 -0400

I realize this borders on advertisement, so if you are offended by such
things, please forgive me and read no further.  But I think many subscribers
will find this presentation helpful and informative, and it could be a real
time saver.   Samtec is providing a free service aimed at helping PCB
designers and SI system engineers design high speed boards.  Details on this
service will be presented during a web based, live presentation on
Wednesday.
In a nutshell, we have done some of the hard work for you by designing an
optimized break-out region for several connector types and pin outs.  You
can cut and paste the electrical models directly into your system
simulation.  And you can cut & paste the physical models into your layout
package.  You can think of this as an extension of the reference designs
that IC vendors have offered in the past, but we go a little further.

We have developed pcb stack ups, routing through the break out region, and
controlled impedance traces, all optimized for high speed performance and
low manufacturing cost.  In conjunction with Teraspeed Consulting Group,
these designs have been simulated, optimized, fabbed, and physically tested.
We provide validated SPICE models of the connector, via field, and traces
(length scalable), along with test and simulation data.  Test boards are
available if you would like to validate the models yourself.   Physical
models of the boards are available in Gerber and other CAD formats.  

All are invited to attend a webinar on this topic which will be presented on
Wednesday, July 30, at 11:00 AM EDT.  Click on the following link for more
information. http://www.connectorwizard.com/communication/webinar/home.asp
Or email me or Finalinch@xxxxxxxxxx for more information.

Thank you.

Julian Ferry
High Speed Engineering Manager
Samtec, Inc.






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