Sunil, You have two major tasks on hand: - provide sufficient isolation from the power source to the RF and analog circuits - provide steady power for RF and analog against its own changes in current supply demand The first requirement can be expressed as a transfer function, the second as a self impedance requirement of the filter output. You want to address the transfer function first, this gives you the requirement for the series inductor or ferrite bead and the minimum output capacitance. After that you may need to add more capacitance to avoid droop. In a simple lumped design approach the series inductance of the inductor or ferrite behaves much like the output impedance of a DC source. You may need to do the two tasks iteratively. You can read more on the topic in Teraspeed's DesignCon 2007 paper: PCB Design Methods for Optimum FPGA SerDes Jitter Performance. Regards, Istvan Novak SUN Microsystems sunil bharadwaz wrote: > Hi , > I'am feeding the same DC supply to Digital , Analog & RF circuits. I want to > design a > LC filter on the Power supply path before feeding it to the Analog > portion.Similarly > i want to add one more LC filter before feeding it to the RF portion. > > My DC source of 3.3 Volts could be a DC-DC converter or from buck-boost. > Typical ripple about 10 to 20 mV.The freq of switching typically at 1.2 Mhz. > Of course harmonics cannot be ruled out. > > Rf Transceiver is about 5 Ghz & the Analog is about 50 Mhz. > > Can some one pls suggest me the various design considerations that > need to addressed. > > At the same time since the RF transmitter transmits in bursts for typically > about 500 usec , there would be a change in current from 100 mA to about > 500mA while the transmit is on.Tx duty cycle could be typically 50 %. > > Now the question is , the inductor used in the LC filter could resist the > change > in current & hence there could be a drop in voltage across the inductor which > could feed less than 3.3 Volts to the RF Transmit which is not good. > > Is this true ?If this is true , then should we use a Inductor of lesser value > while > the LC is designed. > > Can some pls suggest the LC filter design considerations keeping in view of > all the above. > > Or are there any better filters that could be considered here. > > Thanks in advance!! > > Regards > Sunil > > > > ------------------------------------------------------------------ To unsubscribe from si-list: si-list-request@xxxxxxxxxxxxx with 'unsubscribe' in the Subject field or to administer your membership from a web page, go to: //www.freelists.org/webpage/si-list For help: si-list-request@xxxxxxxxxxxxx with 'help' in the Subject field List technical documents are available at: http://www.si-list.net List archives are viewable at: //www.freelists.org/archives/si-list or at our remote archives: http://groups.yahoo.com/group/si-list/messages Old (prior to June 6, 2001) list archives are viewable at: http://www.qsl.net/wb6tpu