[SI-LIST] Re: Power plane / VCC plane as reference for differencial microstrips

  • From: zhangkun 29902 <zhang_kun@xxxxxxxxxx>
  • To: niki@xxxxxxxxxxxxxx
  • Date: Sat, 21 Aug 2004 08:01:24 +0800

Niki

We have done some measurement on both testing board and product board. The 
crosstalk is decided by the balance of the differential pair. In the testing 
board, the balance is very good, there is nearly  no crosstalk. In the product 
board, the xtk is affected by the ground connection because of the imbalance.

I hope this will help.

Best Regards

Zhangkun
2004.8.21

----- Original Message -----
From: Niki Steenkamp <niki@xxxxxxxxxxxxxx>
Date: Friday, August 20, 2004 4:27 pm
Subject: [SI-LIST] Power plane / VCC plane as reference for differencial 
microstrips

> Hi,
> 
> I have a six layer board that contains LVDS (up to 600mbps) traces 
> on =
> both
> outer layers.  The top layer uses the solid ground plane beneath 
> it as
> reference plane, while the bottom layer uses the split VCC plane 
> as a
> reference plane.  I am worried about the bottom LVDS layer since 
> the =
> LVDS
> traces have to run over two different VCC planes.  If the 
> transmission =
> lines
> where single ended (as opposed to differential), I would have had 
> to =
> make
> sure the there is a low impedance path for the return current to 
> cross =
> from
> the one VCC plane to the other (using decoupling caps close to the =
> crossover
> point, for instance), but since I am using differential 
> signalling, =
> there
> should be (in theory at least) no net return current.  The (equal and
> opposite) return currents below each microstrip would simply "loop 
> back" =
> when
> they reached the break in the reference plane and a new return 
> current =
> loop
> will be created in the next plane.  Am I understanding this 
> correctly?  =
> I can
> think of two real-world complications: the one is the finite break 
> width(where there is no reference plane, except the ground plane 
> which is a =
> lot
> further away).  The other is the imbalance in the LVDS drivers, 
> making =
> the
> signal not perfrectly differential.  I do not really have a 
> feeling for =
> this,
> is it something to worry about?  Can I expect a signicant 
> reduction in =
> signal
> quality?
> 
> I am unfortunately only a lowly digital design engineer, so my =
> understanding
> of the high frequency aspects are, well, limited at best!  Any 
> feedback =
> from
> the pros would be welcome!
> 
> Regards,
> Niki
> =20
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