Hi Cody, If all what you need is static inner-plane capacitance of the power-ground PCB structure, you can calculate it as a plate capacitance. For a rectangular shape: C=eps_nul*eps_rel*A/d, where A is the Area, d is spacing between conducting planes. For non-rectangular shape you can approximate with a number of smaller rectangular shapes to get a better approximation of the contours. With static plane capacitance the highest-frequency signature you can simulate is the antiresonance between the plane capacitance and inductances of bypass capacitors. Regards, Istvan Novak SUN Microsystems codymiller@xxxxxxxxxx wrote: > Hi group, > > I am simulating decoupling capacitance /power supply impedances in a > spice tool. I am using simple series RLC for my decoupling caps+ via > inductance. My question for the group is how should I model inner-plane > capacitance? > > Thanks, > Cody > > > ------------------------------------------------------------------ To unsubscribe from si-list: si-list-request@xxxxxxxxxxxxx with 'unsubscribe' in the Subject field or to administer your membership from a web page, go to: //www.freelists.org/webpage/si-list For help: si-list-request@xxxxxxxxxxxxx with 'help' in the Subject field List technical documents are available at: http://www.si-list.net List archives are viewable at: //www.freelists.org/archives/si-list or at our remote archives: http://groups.yahoo.com/group/si-list/messages Old (prior to June 6, 2001) list archives are viewable at: http://www.qsl.net/wb6tpu