I have been tasked to cost reduce a PCB with special focus in the DC-DC power supply decoupling/bypass circuits. In the past the "standard" rules (which we know by now are all bad) were used to sprinkle decoupling caps throughout the power planes of this particular PCB. One cap per power pin, at least one decade apart, blah, blah, blah. I was wondering if someone might be able to suggest an efficient way to evalutae this. The problem is that the IC's being used are proprietary, and the specs have very little information describing power consumption, etc. This makes working the problem from a purely theoretical viewpoint impossible. I do have the benefit of have a board or two to play with. While, I could go in there and simply remove caps until it breaks...I would rather take a more reliable and scientific approach. Here's what I am thinking. I can measure the impedance of the plane structures on a PCB without any components, and then on one with only caps using a Spectrum Analyzer. This can give me an idea for the Impedance of the PCB over Freq. I then need to come up with a strategy for determining what freq's I am most interested in. Any suggestions here? Thanks. ------------------------------------------------------------------ To unsubscribe from si-list: si-list-request@xxxxxxxxxxxxx with 'unsubscribe' in the Subject field or to administer your membership from a web page, go to: //www.freelists.org/webpage/si-list For help: si-list-request@xxxxxxxxxxxxx with 'help' in the Subject field List technical documents are available at: http://www.si-list.org List archives are viewable at: //www.freelists.org/archives/si-list or at our remote archives: http://groups.yahoo.com/group/si-list/messages Old (prior to June 6, 2001) list archives are viewable at: http://www.qsl.net/wb6tpu