[SI-LIST] Re: Power Plane impedance simulation in PowerSI
- From: Istvan Novak <istvan.novak@xxxxxxx>
- To: Dan <signal.integrity2@xxxxxxxxx>
- Date: Thu, 17 Feb 2011 08:29:56 -0500
Dan,
Good embedded capacitance layer may help, but not to the extent that is
expected here.
We get 3mOhm impedance at 500MHz from just 1pH inductance. One bypass
capacitor
has several hundred pH loop inductance at best, say 500pH. If we pave
the back side of
the BGA field with capacitors (and not rely on thin laminates), we need
at least 500 of
them to get 1pH inductance. I assume the cumulative inductance of all of
the capacitors
in your circuit is higher than 1pH, and they are probably not all
directly in the BGA pinfield,
so the next we can rely on is the low inductance of the embedded
capacitance layer.
1mil plane separation (25.4 micrometer) comes with approximately 33pH
plane inductance.
If we wanted to get 1pH, we would need a dielectric thickness of less
than a micrometer.
Bottom line: when it comes to milliohm self impedances, the inductance
of capacitors and
planes will limit us up h frequencies we can maintain it.
Regards,
Istvan Novak
Oracle
On 2/17/2011 2:21 AM, Dan wrote:
> Hi All,
> I am simulating a big board which is 12"x!2" dimension and 44 layer stackup.
> I have FPGA in the center of the board (TOP layer). all the decoupling
> capacitors are straight below the DUT in the bottom layer. The position of
> the decaps are optimized and it has the shortest inductive path as possible.
>
> my target impedance is 3 mohms. I am simulating this board in powerSI to
> find the power plane impedance. But the impedance i obtain is around 30 m
> ohms between 400MHZ and 600 MHz which is the frequency of operation.
>
> I change all the capacitor models with the various lowESR and low ESL caps s
> parameter model available with various capacitor manufacturers. the
> impedance is not getting lowered. Since it is a very big board, i am not
> able to do quick iterations. So now i tried by cutting the DUT region and
> simulating the smal area of 4"x4". I know the impedance may not be correct.
> In the same i got a 10 m ohm impedance in the power plane. But i tried 10
> iteration with various capacitor even with the worst case ESR and ESL caps.
> but the impedance plot didnt not change.
>
> I have a good embeded PCB capacitance as well. Any comments or idea how
> to get closer to the target impedance? and why the impedance is not changing
> at all in the smaller cut model even after changing the caps. Any PowerSI
> users please post your comments or idea about this problem or the tool.
>
> Thank You
> Dan
>
>
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