[SI-LIST] Re: Power Consumption of a bus
- From: "Ingraham, Andrew" <Andrew.Ingraham@xxxxxx>
- To: <Lucas_Bossetti@xxxxxxxxxxx>
- Date: Fri, 14 Mar 2003 11:14:31 -0500
> Could someone tell me how to estimate the power consumption of the I/O
> power
> pins of a device?
You can get a fair estimate to start with, by calculating the total load
capacitance seen by each I/O pin: IC packages, traces, etc.
Then Q = C * deltaV is the charge needed every time a line switches from
low to high.
Then use the switching frequency (and any information you have about
statistically how often your bus lines switch) to get an estimate for
average current.
This works even if the traces are long and need to be treated like
transmission lines for SI analysis, rather than lumped loads. To switch
a line high, you need to transfer X coulombs onto it, regardless of
whether they go slowly (RC-limited risetime) or fast with lots of
reflections, and with or without series terminations.
Some things this doesn't account for are:
(1) Parallel terminations, or pull-up or pull-down resistors.
(2) Crossover or "short-circuit" current. Some output buffers with
totem-pole (push-pull) outputs, turn on one transistor while the other
has not turned off yet, providing a momentary direct path from VDD to
VSS.
(3) Any other current that the buffer consumes with no load, such as for
charging and discharging internal nodes. The data sheet may have a
no-load power consumption which includes both (2) and (3), though these
values may change somewhat when the buffer is loaded.
(4) Current into clamp diodes if you have much overshoot.
(5) Switching an output before it reaches steady-state.
Regards,
Andy
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