[SI-LIST] Potentially Dumb Question About Routing Layers
- From: "Nash, Timothy J" <timothy.j.nash@xxxxxxxx>
- To: si-list@xxxxxxxxxxxxx
- Date: Wed, 11 Mar 2009 14:49:00 -0600
SI Gurus:
How common is the practice of sharing a routing layer with a power or
ground region (i.e. an FPGA core voltage plane)? If I can find a
reasonable return path for the signals, at face value, it appears to be
ok. But something screams inside of me that this isn't a good idea, but
I can't really explain why.
Thanks in advance,
Tim
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