[SI-LIST] Re: Plane breaks - Presentation download

  • From: Eric Goodill <ericg@xxxxxxxxxxx>
  • To: 'Si-List' <si-list@xxxxxxxxxxxxx>
  • Date: Mon, 24 Jan 2005 17:09:19 -0800

Charles,

I certainly don't consider myself any kind of expert--rather an 
interested observer, but for the kind of weakly-coupled edge-coupled 
diff pairs we use (e.g., 4 mil track with 8 mil gap), and that I 
understand many folks use, I've seen an analysis of the return current 
distributions, and the bulk of it is in the reference plane below each 
trace.

Let's take traces A and B of a diff pair.  Only 20 - 30% of the return 
current from A is traveling in trace B with the remaining 70 - 80% in 
the reference plane underneath A.  The same is true of B.  Granted, 
there is overlap of the return currents from both A and B in the ref 
plane, and there's some cancellation, but there's still a significant 
amount (50%?) of return current under each trace.

Or am I all wrong?

Assuming I'm right, as a diff pair crosses the plane split, I can't see 
how the return current for trace A jumps from the plane to trace B and 
then back down to the reference plane below A.  That seems unlikely to 
me.  I would expect this return current to have to navigate around the 
slot by whatever means it can which would still end up doing bad things 
to your signal.

Granted, the effect would be less that you would see on a single-ended 
signal due to whatever return current is in the other trace of the pair.

-Eric

Grasso, Charles wrote:
> Steve/Ron - Just to calibrate myself ... Now you DO
> mean a trace crossing a split orthogonally right?
> If so I fail to see how changing the width of the
> split makes things better except maybe in one condition.
> i.e. where a diff pair cross a split. The return current
> for one trace will be carried by its pair and the split will
> be almost invisible.
> 
> The effect of crossing a split on a diff pair
> can be seen in a presentation by Ansoft Corp
> available for download from the RMCEMC website.
> Go to http://www.ieee.org/rmcemc the link is
> on the front page. You'll need to go in about 12
> pages or so...
> 
> Best Regards
> Charles Grasso
> Senior Compliance Engineer
> Echostar Communications Corp.
> Tel:  303-706-5467
> Fax: 303-799-6222
> Cell: 303-204-2974
> Pager/Short Message:  3032042974@xxxxxxxx
> Email: charles.grasso@xxxxxxxxxxxx;  
> Email Alternate: chasgrasso@xxxxxxxx
>  
> 
> 
> -----Original Message-----
> From: steve weir [mailto:weirsp@xxxxxxxxxx] 
> Sent: Saturday, January 22, 2005 4:19 PM
> To: ron@xxxxxxxxxxx; Chris.Cheng@xxxxxxxxxxxx
> Cc: Si-List
> Subject: [SI-LIST] Re: risetime effects of plane breaks
> 
> 
> Ron,
> 
> Do you really mean to imply that the cross-talk falls substantially if the 
> slot gap is increased to 2H or more?  That is a new and very 
> counterintuitive notion to me.  I would be very interested in seeing any 
> A/B model that could demonstrate such a phenomena.
> 
> Regards,
> 
> 
> Steve.
> 
> At 10:13 PM 1/21/2005 -0800, ron@xxxxxxxxxxx wrote:
> 
>>A few years ago Intel discovered that when a trace crosses a split it 
>>can excite a transmission line mode into the slot between the panes 
>>called "slot line" strangely enough.  If the gap is small
>>it works quite well and all the traces crossing it become cross-talk for
>>one another.
>>
>>To avoid it make the gap at least 2 or 3 times the thickness of the 
>>dielectric.
>>
>>ADS (Agilent) has a model for slot lines with the other transmission 
>>lines.
>>
>>Ron
>>
>>Chris Cheng wrote:
>>
>>
>>>Scott,
>>>Excellent summary. That was my concern on striplines crossing with a 
>>>bus rather than individual signals. In a way, it is like wire bond 
>>>signal leads without the ground leads mixed among them. The signals 
>>>start referencing each other instead. Or you can see it as a 
>>>trade-off between adding shielding layers or spreading the bus 
>>>spacing (decreasing routing channels) in a high density/performance 
>>>design. My own rule of thumb is space them at least equal or larger 
>>>than the gap itself when crossing. That's is at least a 3x decrease 
>>>in routing channels so it is quite costly and has to be weight 
>>>against adding shielding layers. Sometimes its worth it, sometimes 
>>>its not. As for EMI, if you dig back some discussion I had with 
>>>Steve, I always prefer solid ground planes referencing microstrips on 
>>>top and bottom of PCB and then stitch the edges with ground vias. 
>>>Hopefully any of those excited noise on the cut power planes will be 
>>>trapped inside.
>>>
>>>-----Original Message-----
>>>From: Scott McMorrow [mailto:scott@xxxxxxxxxxxxx]
>>>Sent: Thursday, January 20, 2005 2:39 PM
>>>Cc: Si-List
>>>Subject: [SI-LIST] Re: risetime effects of plane breaks
>>>
>>>
>>>When this thread started I was on vacation.  However, I found this 
>>>interesting enough to resurrect some previous simulations I'd 
>>>performed in CST Microwave Studio.  After much playing, twiddling and 
>>>generally having fun I can say several things:
>>>1) It's pretty easy to confirm Doug's results using 3D fullwave 
>>>simulation. In fact, in about 30 minutes I can replicate his case and 
>>>create a design that can be easily modified for many other 
>>>possibilites.  The microstrip split plane crossing is a no-brainer. 
>>>Just don't do it and expect anything approaching an EMI "clean" 
>>>system.
>>>
>>>2) Chris and Steve ... and eventually myself, wanted to know more 
>>>about the various different stripline plane crossing configurations, 
>>>so I setup a simulation with a VDD island not unlike what might be 
>>>found in a memory system, and performed multiple simulations with 
>>>dual asymmeteric stripline crossing the plane twice on it's way to 
>>>the memory module. Not surprisingly the following is true:
>>>
>>>   It is best not to cross a split plane ... even with stripline.
>>>   If you do, it is better to cross a split that is adjacent to a
>>>   ground plane
>>>   It is even better if you cross a split adjacent to a ground plane on
>>>   the stripline layer furthest away from the split plane (i.e. next to
>>>   a ground plane)
>>>   It is worst to cross a split plane that has no adjacent ground.
>>>   The width of the gap in the plane makes very little difference until
>>>   it becomes really small or really big.
>>>   Crosstalk scales almost linearly with the number of aggressors
>>>   crossing the split. (i.e. - it can get really bad!)
>>>   Bypass of the split power island helps for frequencies below 500
>>>   MHz, provides no help for frequencies higher than 500 MHz, and as
>>>   such has no benefit to most of the noise and crosstalk created by
>>>   high speed signals crossing onto and off of the island.
>>>
>>>The energy released into the power/ground plane cavities by high 
>>>speed signal split plane crossings is huge and essentially cannot be 
>>>suppressed with bypass capacitors.  Any attempt at supprerssion with 
>>>capacitors exhibits what I call a "Whack-A-Mole" property.  You can 
>>>never get rid of those pesky little moles. All you can do is to move 
>>>them around by thumping them. Given that all this energy is rattling 
>>>around the PCB power planes from split plane crossings, it will 
>>>eventually go somewhere.  Since it's really easy to develop all sorts 
>>>of resonant power island cavities that have primary resonant 
>>>frequencies in the 500 MHz to several GHz range, it is not at all 
>>>unlikely that any split plane crossing has an extremely strong 
>>>potential to excite a resonance in a frequency range that will cause 
>>>most systems to fail EMC compliance testing  About all you can do is 
>>>to shield the cavity patches using ground layers.  This should reduce 
>>>the radiated energy significantly, but will not totally eliminate it, 
>>>since eventually it will find it's way to all those pesky device and 
>>>package leads.
>>>
>>>
>>>best regards,
>>>
>>>Scott
>>>
>>>
>>>
>>
>>
>>--
>>Ronald Miller
>>Ghz Data, Signal Integrity Consulting
>>7721 Sunset Ave.
>>Newark CA  94560
>>tel     510-793-4744
>>cell    510-377-9380
>>fax     510-742-6686
>>www.ghzdata.com


------------------------------------------------------------------
To unsubscribe from si-list:
si-list-request@xxxxxxxxxxxxx with 'unsubscribe' in the Subject field

or to administer your membership from a web page, go to:
//www.freelists.org/webpage/si-list

For help:
si-list-request@xxxxxxxxxxxxx with 'help' in the Subject field

List FAQ wiki page is located at:
                http://si-list.org/wiki/wiki.pl?Si-List_FAQ

List technical documents are available at:
                http://www.si-list.org

List archives are viewable at:     
                //www.freelists.org/archives/si-list
or at our remote archives:
                http://groups.yahoo.com/group/si-list/messages
Old (prior to June 6, 2001) list archives are viewable at:
                http://www.qsl.net/wb6tpu
  

Other related posts: