[SI-LIST] Re: Phase/Frequency Detector!
- From: "Michael Poimboeuf" <Michael_Poimboeuf@xxxxxxxxxxxxxx>
- To: <DLieby@xxxxxxxxxx>, <levinpa@xxxxxxxxxxxxx>,"SI-List Reflector" <si-list@xxxxxxxxxxxxx>
- Date: Wed, 20 Aug 2003 09:04:40 -0700
In low bandwidth (slow - low jitter) PLLs where I use=20
a PFD I also use acquisition circuits of appropriate=20
complexity to detect input reference signals that are=20
out of lock range and then auto-center "park" the PLL=20
at a "stand-alone" reference frequency when the input=20
reference is out of lock range.
The most common out of lock range issue is what
David refers to below: no signal present. Other
out of lock examples are PAL references into NTSC
genlock circuits, or many combinations of digital
television ATSC/HD genlock references with the 36
possible ATSC standards.
I wrote a paper with some examples of an PLL architeture
used for ATSC/HD and digital cinema genlock published in
the Society of Motion Picture and Television Engineers=20
(SMPTE) Journal of April 2001. It's not online, but you=20
can find it at the library.
---
mkp=20
-----Original Message-----
From: Lieby David [mailto:DLieby@xxxxxxxxxx]
Sent: Wednesday, August 20, 2003 8:02 AM
To: levinpa@xxxxxxxxxxxxx; SI-List Reflector
Cc: parthsv@xxxxxxxxx
Subject: [SI-LIST] Re: Phase/Frequency Detector!
Hi,
If I read this right the PFD will slew to the lowest
possible frequency when no input signal is present.
In the PD the frequency settles to a nominal center
value or stays where it is.
If one needs to acquire phase lock rapidly to a well
defined input frequency, and you can afford to have the
local pll trimmed to close to the input, the PD will
get you there rapidly. This type will lock to F/3
also.
OTOH the PFD can be used to lock onto a broader range
of frequencies and allows very sloppy original Fo.
dav0
--=20
David Lieby, SI Engineering
Siemens Medical Solutions USA, Inc.
Ultrasound Division
Paul Levin wrote:
> Dear Partha,
>=20
> As you indicated, with a phase detector all one knows
> is the phase error. Whether that is a voltage resulting
> from pulse width modulation or a voltage resulting from
> charge pumps, that is all you know. In either case, if
> the frequencies are way off, you get a sinusoidal varying
> voltage whose average voltage is zero (give or take the
> offset.) This gives you no information as to which way to
> move the VCO. That is why a straight phase detector has
> a limited acquisition range; a PLL based on a phase detector
> must be able to "catch" the frequency during a fraction
> of a beat period.
>=20
> On the other hand, a phase-frequency detector gives you
> information about which of the two frequencies is higher.
> When the two frequencies are way off, the output voltage,
> however created, will have a real dc content indicating
> which way the VCO should move to get closer. As the two
> frequencies get closer together, the PFD reverts to being
> a phase detector, so you can phase-lock the loop.
>=20
> The simplest way of thinking of a PFD is to imagine a two
> bit up-down counter. Every time you get a reference pulse,
> the counter moves one way (let's say up), and every time
> you get a VCO pulse, the counter moves the other way (call
> this down.) This counter also saturates at 00 and 11 so
> that if the counter is 00 and you get a VCO pulse, the
> counter will remain at 00 or if the counter is 11 and you
> get a reference pulse, the counter will remain at 11. The
> PFD output is the more significant bit. If you get two
> reference pulses in a row, the VCO is too slow and you
> want to speed it up. Since the counter now oscillates
> between 10 or 11, and the MSB is a solid 1. Thus, the VCO
> is driven to a higher frequency. Once the VCO gets high
> enough (and actually just a bit too high,) there will be
> two VCO pulses in a row, and the counter will settle into
> a pattern between 01 and 10. Since the MSB is now oscillating,
> you have the equivalent of an XOR output between the two
> signals, i.e., a classic phase detector.
>=20
> Hope that this helps.
>=20
> Regards,
>=20
> Paul
> ____________________
>=20
> Parthasarathy Sampath wrote:
>=20
>=20
>>Hi All,
>>Whats the difference between Phase detector and
>>Phase/Freq Detector?
>>
>>Why is PFD advantageous to PF?
>>- Normally PF has low acquisition range limited by
>>usage of Low Pass Filter. In PFD we use charge pump
>>instead of LPF. Is that the main reason?
>>
>>Thanks in Advance,
>>
>>Regards,
>>Partha!
>>
>>__________________________________
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>=20
>=20
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