[SI-LIST] Re: Parallel resonance (anti-resonance) on power distribution system and Full impedance compensation concept

  • From: Rodrigo Rodriguez <coco.roro@xxxxxxxxxxx>
  • To: <istvan.novak@xxxxxxx>, <weirsi@xxxxxxxxxx>
  • Date: Sat, 10 Apr 2010 23:26:38 -0400

Hi Steve, Istvan,

Thanks for your feedback.

At the end, the basic rule is to keep inductance low for a reliable power 
distribution system.

Regards.

 

Rodrigo
 
> Date: Sat, 10 Apr 2010 10:05:33 -0400
> From: istvan.novak@xxxxxxx
> To: weirsi@xxxxxxxxxx; coco.roro@xxxxxxxxxxx
> CC: si-list@xxxxxxxxxxxxx
> Subject: Re: [SI-LIST] Re: Parallel resonance (anti-resonance) on power 
> distribution system and Full impedance compensation concept
> 
> Steve, Rodrigo,
> 
> In the context how the Mezhiba, Friedman book treats it in Section 5.7, 
> it is a derivative of the
> Adaptive Voltage Positioning concept (by Redl et al) and Extended 
> Adaptive Voltage Positioning
> (by Waizman and Chung). Figures 5.21 and 5.22 indicate the original 
> intent of having so low
> Q from each component bank that there is a flat impedance bottom before 
> the next component
> bank joins in on the frequency scale.
> 
> As Steve pointed out, a key requirement is to keep inductance low, but 
> it is relative to SRF and
> ESR: high ESR components work very well with moderate or high inductance 
> in such designs.
> 
> Yes, the concept can be implemented with good results, as long as 
> spatial variations are not
> significant and/or suppressed. This also means that this design 
> methodology usually stops at
> the package-silicon interface. And yes, it in fact has been 
> implemented; many thousands
> boards and systems have been shipped, implementing different flavors of 
> the concept.
> 
> When it comes to simulation tools: we need to remember that they are 
> what they are: simulation
> tools, analyzing the design we plug in. In that regard any simulation 
> tool can handle the concept.
> I suspect the question was more about design features of the tools: 
> several PDN tools today
> offer PDN optimization, and those optimization procedures in theory 
> encompass the full
> impedance compensation variant as well. The caveat is that the tool 
> will give results based on
> the component library it has built in, so you may need to add the very 
> low Q parts and force
> the tool to use those.
> 
> Regards,
> 
> Istvan Novak
> Oracle-SUN
> 
> 
> 
> 
> steve weir wrote:
> > That term appears in Mezhiba, Friedman "Power Distribution Networks in 
> > High Speed Integrated Circuits". As used in that book, it refers to 
> > tuned compensation networks in order to damp out PDN resonances. In 
> > effect, all multipole networks (FDTIM in Altera parlance) do this to 
> > some degree although in more of a whack-a-mole fashion. Sigrity's 
> > Optimize PI(tm) product will calculate the capacitor network for you. 
> > The Cadence Allegro PI(tm) and Mentor Hyperlynx PI(tm)tools will both 
> > evaluate a capacitor network of your specification.
> >
> > In order to perform the kind of compensation that Mezhiba and Friedman 
> > talk about, the tricky part is finding capacitors with the combination 
> > of ESR and capacitance that you want. As frequency goes up this becomes 
> > tougher and tougher. You are very unlikely to find the values you want 
> > right off the shelf, forcing compromise. If you pick a capacitor and 
> > the mounted SRF lands in the wrong place due to tolerances, and/or the 
> > capacitor Q is too high, then you will take one peak and turn it into 
> > two or more peaks. Since inductance directly contributes to Q, as in 
> > all other things PDN, inductance is the primary enemy here. The lower 
> > the mounted inductance of the cap compared to the ESR the easier it will 
> > be to realize an effective compensation network. Because they have very 
> > low mounted inductance and are available over a wide value range, X2Y(r) 
> > caps are particularly good for this kind of duty. There is an example 
> > on the X2Y(r) website where one capacitor compensated out a resonance at 
> > about 600MHz very nicely contributing to dramatically improved SerDes 
> > jitter:
> >
> > http://www.x2y.com/bypass/method/altera_bypass.pdf
> >
> > Steve.
> >
> >
> > Rodrigo Rodriguez wrote:
> > 
> >> Hello,
> >>
> >> 
> >>
> >> >From what I read, the concept of "Full Impedance compensation" applied to 
> >> >power distribution system with decoupling capacitors sounds an interest 
> >> >concept to achieve the target impedance over the wide frequency range of 
> >> >a power distribution network with a damped or fully compensated impedance 
> >> >which eliminates the anti-resonant peaks due to parallel RLC tank formed 
> >> >by the decoupling capacitors.
> >>
> >> 
> >>
> >> I would like your guidance on recommended source of information about the 
> >> concept of Full Impedance Compensation applied on Power Distribution 
> >> System for the reduction of the impedance (damped anti-resonant 
> >> impedance). 
> >>
> >> 
> >>
> >> - Has this concept being applied to real applications?
> >>
> >> - Is this concept used on comercially available SI simulation tools?
> >>
> >> 
> >>
> >> Thanks.
> >>
> >> 
> >>
> >> Rodrigo
> >>
> >> 
                                          
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