[SI-LIST] Re: Parallel Inductor in Capacitor !!!

  • From: Ray Anderson <ray.anderson@xxxxxxxxxx>
  • To: <si-list@xxxxxxxxxxxxx>
  • Date: Fri, 13 May 2011 10:29:03 -0700

Oops, you're right! Sorry 'bout that....

The resistor is only there to make the simulator happy by eliminating
floating nodes that spice doesn't like.


-----Original Message-----
From: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx]
On Behalf Of Andrew Ingraham
Sent: Friday, May 13, 2011 10:21 AM
To: si-list@xxxxxxxxxxxxx
Subject: [SI-LIST] Re: Parallel Inductor in Capacitor !!!

> Schematic of the model can be seen here:
> https://sites.google.com/site/wb6tpu2/home/decap_schematic-1

One small nit/correction (which hardly affects anything):

The leakage resistor across the top on the diagram, is actually only
across the capacitor on the far left (Port1 to node 11).


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